01-14-2020 03:28 PM
On ZC706, Vivado 2019.1 - When using MIG to build a DDR3 controller to let me write directly from PL to the DDR3 SODIMM memory, I tell it to use "known and fixed" pinouts, but pin setup page shows only signal names (no pin parameters) and there aren't any address bits shown above 13. The number of data bits shown matches the word width I've selected in the MIG dialogs, so I get the feeling MIG is not using any existing pinout and making its own.
Can you tell me where to find the xdc file that represents the pin parameters for this board? There's nothing in my project, nor in the Vivado 2019 installation area.
01-15-2020 11:35 AM
I found the XDC file for the ZC706 board on the Xilinx site and incorporated the DDR3 pins into my XDC file. It appears that the MIG pin setup dialog still does not see these pins, even when I tell it to explicitly read the XDC file. When I click validate, it consistently reports that ddr3_addr is missing in the constraints file, despite the fact that it's present. When I click Save Pinout in the MIG I get a 0-length file. Can someone please tell me how to successfully use the MIG with the DDR3 SODIMM?
01-23-2020 02:48 PM
I had the same problem, I found a tutorial that provided a working file, but it was a pain to get it to be recognized and the whole process felt hacky.
Instead, I ended up acquiring the board files for the ZC706, and selecting them when I created my project. Then, when you enter the MIG IP customization wizard, you can have it populate them for you and it will use the board files.
Another potential problem: if you did not specifically select the ZYNQ7000 family as a part of your installation, you may not have the board files available. In this case, you would either need to reinstall or find the board files manually and add them.
01-28-2020 01:42 PM
Thanks for your response. As a sanity check I retraced some of my previous steps, with identical results. From a MIG tutorial I got a board xdc file but could only read the MIG signal population via a ucf version of that xdc file. (MIG wouldn't read the xdc version).
Now, from Xilinx, under ZC706 board files I downloaded the zipped board files and extracted zc706_r1.0.ucf.xdc
When you said you selected the board files when you created the project, does that mean you selected the board and then added the constraint file as part of the setup? That's what I did. I also specified Zynq7000 during my Vivado (2019.1) installation.
I ran MIG and got to the pin assignment page, which had no values in it except for pin names in the left column. Then I clicked on Read UCF/XDC and specified the xdc file, but nothing changed. I also extracted the UCF file and tried that and nothing changed. I then modified the xdc file by stripping all non-DDR3-related signals and changing the DDR3 signal names to match those in the MIG window's left column but no luck there either.
So I have two questions:
- Am I overlooking something really obvious in loading the xdc file in MIG?
- The tutorial's xdc file was full of properties set for MIG-internal signals. Do you know if MIG modifies a project's xdc file?
01-28-2020 03:19 PM
When I said I used the board files, I mean that when I created my project using the GUI tool, I searched for and selected the board for the project. As I understand it, if you do so, there is no need for a .xdc file unless you want to override a default setting for a pin mapping.
After setting up your PS in a bd file, add the MIG and customize it. Make sure you select the model pinout associated with the FPGA (xc7z045):
Just before the pin assignment screen, select "New Design: Pick the optimum banks for a new design. At the next screen, it should already have populated the valid pin assignments:
A few other things: Make sure you have the right memory type selected, and an appropriate speed for the clock. I would imagine that if you pick something that is not available on the board, it will not be able to appropriately assign the pins.
I have no idea if the MIG modifies the .xdc file, maybe a more knowledgable person could chime in here.
Hope that helps, good luck!
01-28-2020 07:38 PM
Hmmm, below is my Bank Selection screen and it shows that nothing has been populated. When I attempt to assign a signal set on this screen Vivado crashes immediately with no error message. I set up my program just like you did, specifying the ZC706 board.
When you started the project in which you captured the screens you showed, did you at any time need to specify an xdc file? I think I need to do some more reading on xdc files in Vivado... maybe something is missing in my installation.