02-19-2014 08:58 AM
We have implemented a computer vision application using Zynq. We use the PL for some parallel processing, and the ARM for the rest of the computation. Now, we want to do a time profiling of the whole system. We have measured the computation times in the ARM, and we have also measured the time the PL takes for its filters, but we don't know how to measure the communication overhead between different parts of the system.
This is our PL-PS communication flow for each cycle:
1. The PL processes the frame that captures from a camera, and it stores the data in internal Block RAMs (BRAMs). These BRAMs are read by the AXI4 Stream Slave which sends the information to the S_AXIS_S2MM channel of
the Xilinx AXI DMA module. The M_AXI_S2MM channel is the responsible for sending the pixel data to the DDR Controller using the S_AXI_HP channel. Thus, the captured frame is stored in the DDR SDRAM.
2. The PL uses a GPIO to notify the PS that the new frame is stored in the DDRAM.
3. The PS reads the stored image, carries out some processing and saves it into the DDR SDRAM again.
4. The PS uses a GPIO to notify the PL that it has finished processing the frame.
5. The PL reads the preprocessed image from the DDR SDRAM using the M AXI MM2S channel of the Xilinx AXI DMA module and it applies another filter.
6. The filtered image is stored again in the DDR SDRAM
7. The PS reads the filtered image completing the computer vision algorithm.
How can we measure all these communication times? PL-PS, PS-PL. PL-DDRAM, etc..
Thank you in advance!!
10-20-2015 03:36 PM