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himesh.bilimoria
Observer
Observer
6,210 Views
Registered: ‎05-21-2015

UART 16550 Register Offsets

Hi, 

 

I am looking at the documentation for the AXI Uart 16550 IP Core and when I look at the register offsets they all start with Base Address + 0x1000 as shown in this document on page 12 http://www.xilinx.com/support/documentation/ip_documentation/axi_uart16550/v2_0/pg143-axi-uart16550.pdf. However, when I try to access the registers based on the offsets that are in the document it doesn't seem to work.

 

I researched the TI PC16550D core which the AXI Uart is based off of and they seem to use different offsets which start at 0x00 as shown in this document http://www.ti.com/lit/ds/symlink/pc16550d.pdf on page 18. I used those offsets and I was able to access the registers properly. I was just wondering why there is this discreptancy between the Xilinx documents and the TI documents for what seems to be the exact same IP core. 

 

Also I am accessing the registers by first memory mapping the base address on /dev/mem/ using the mmap() command and I am then adding the offset using pointers to access the registers I want. 

 

Any help is appreciated.

 

Thanks

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pvenugo
Moderator
Moderator
6,102 Views
Registered: ‎07-31-2012

Hi,

 

You can use this kind of code style to access registers. 

E.g.  (void)XUartNs550_ReadReg(InstancePtr->BaseAddress,XUN_RBR_OFFSET); 

 

Attached is screenshot for the above code which shows RBR offeset value i.e. 0x1000

 

Regards

Praveen

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uart16550_RBRoffset.jpg
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