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674 Views
Registered: ‎05-23-2018

ULPI register access on Zynq MP+

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Is it possible to read/write ULPI registers on a Zynq MPSoC?
Let's say I for example would like to set pull ups on a USB3320 PHY.

I saw that it seemed possible when using the AXI USB 2.0 IP (usb):

But nothing similar when using the built in Zynq MP USB driver (usbpsu).

Vivado/XSDK 2018.3.

Erasmus Cedernaes
Saab

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596 Views
Registered: ‎05-23-2018

Re: ULPI register access on Zynq MP+

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I solved this by looking in the example code ritakur provided as well as the UG1087 where there is a register called GUSB2PHYACC_ULPI in USB3_XHCI which is used for accessing ULPI registers. Setting the bit REGWR indicates that it's a write instead of a read. The data to write shall be placed in REGDATA.

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Xilinx Employee
Xilinx Employee
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Registered: ‎09-01-2014

Re: ULPI register access on Zynq MP+

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yes, you can access USB PHY register as USB3320 used on ZCU102.
I attached the C code I used for PS USB0.

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Xilinx Employee
Xilinx Employee
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Registered: ‎09-01-2014

Re: ULPI register access on Zynq MP+

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it's a Linux app. Command in Linux as follows
USB0:
./phy_dump.elf 0

USB1:
./phy_dump.elf 1
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Registered: ‎05-23-2018

Re: ULPI register access on Zynq MP+

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Hi,

The example code only seems to read ULPI-registers. Is it possible to also write to them?

Alternatively, is there any documentation that covers the meaning of the bits in the GUSB2PHYACC_ULPI register and how to interact with it?

Erasmus Cedernaes

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Highlighted
597 Views
Registered: ‎05-23-2018

Re: ULPI register access on Zynq MP+

Jump to solution

I solved this by looking in the example code ritakur provided as well as the UG1087 where there is a register called GUSB2PHYACC_ULPI in USB3_XHCI which is used for accessing ULPI registers. Setting the bit REGWR indicates that it's a write instead of a read. The data to write shall be placed in REGDATA.

View solution in original post

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