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deniz_soysal
Visitor
Visitor
286 Views
Registered: ‎04-02-2021

Using SPI to communicate with an ADC

Hello,

 

I have some difficulties to read the analog inputs of an ADC (TLV2553), using the SPI protocle.

In the following table, we can see how to configurate the ADC :

deniz_soysal_0-1617442489500.png

In my master SPI, I am using 12 bits communications, so I add 4 '1' bits at the end of each configuration data to have a 12 bits write transmission.

First I tried to read the analog input channel 0. To do that, I've sent the value "0000 0000 1111" on the MOSI line (the last 4 '1' is to have a 12 bits communication).

Here is the results I get when programming my device : 

deniz_soysal_1-1617442570266.png

We can see that the ADC sent us back on the MISO line the value it reads on the analog input channel 0. After that, I store that value on a register (d9f on the waveform).

Then I tried to read the analog input channel 1. To do that, I've sent the value "0001 0000 1111" on the MOSI line according to the table (the last 4 '1' is to have a 12 bits communication).

Here is the results I get when programming my device : 

deniz_soysal_2-1617442667968.png

The ADC sent nothing on the MISO line, even if a put the same voltage on this channel.

Do you have any idea of a potential solution to this problem ? 

 

Thank you,

 

Deniz

 

 

 

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bruce_karaffa
Scholar
Scholar
244 Views
Registered: ‎06-21-2017

Is your SPI interface an MIO interface on the PS side of a Zynq, or is it coded in FPGA fabric?  If it is in the FPGA fabric, is the interface an IP core or did you code it yourself?  Can you read from channel 0 repeatedly or only once?

deniz_soysal
Visitor
Visitor
230 Views
Registered: ‎04-02-2021

Hello Bruce, thanks for your answer.

I can read from channel 0 repeatedly.

The SPI interface is one I code it myself. It is a bit long so I will just post the process with the data transferts. I also have another AXI-lite interface, so that's why I use r_valid, w_ready, ...

So I have an FSM with a chip select state (S_CS), a DATA state where data is transferred, and a SYNC state 

when S_CS =>

w_ready <= '0';
r_valid_b0 <= '0';
spi_csn <= '0';
spi_mosi <= '1';
clk_en <= '0';


when S_DATA =>

w_ready <= '0';
r_valid_b0 <= '0';
spi_csn <= '0';
clk_en <= '1';
spi_mosi <= w_data_b0(C_LENGTH - 1 - cnt);
r_data_b0(C_LENGTH - 1 - cnt) <= spi_miso;

when S_SYNC =>

w_ready <= '0';
r_valid_b0 <= '1';
spi_mosi <= '1';
r_data <= r_data_b0;
spi_csn <= '1';
clk_en <= '0';

I personnaly think that the problem is that the ADC doesn't understand that I want to read from channel 1. Is the configuration data sent correct ? (0001 0000 1111)

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venui
Moderator
Moderator
123 Views
Registered: ‎04-09-2019

Hi @deniz_soysal ,

Can you please write b`0000 0001 1111 values instead of b`0001 0000 1111 and try.

Regards,

Venu

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