Vivado 2018 flashing Issue

[vicfer89]

I've been trying to flash a AMP code into a Zynq 7020 using vivado 2018.3. Using the debugger the code works properly, ARM0 starts ARM1, and ARM1 executes its program with no issue.

My problem comes when Zynq is flashed, then, ARM0 starts its execution properly, but ARM1 remains stalled all the time. 

Same project has been compiled and flashed sucessfuly in vivado 2014.4.

Does someone have any possible cause or guideline which can help me?

Thanks in advance.

[savula]

Hi @vicfer89 ,

How do you created the flash file? Please check this wiki page:

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842203/Unsupervised+AMP

Best Regards,
Srikanth
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[vicfer89]

Hi @savula,

Thanks for your response. 

I've been reading wiki topich which you have proposed. I understood that XAAP1079 should still works, and this is the process I had follow to generate the flash file.

In order to provide more information, I'm going to insert the code here:

For ARM0:

void init_CPU1(void)
{
    u32 RegVal;
    //Disable cache on OCM
    Xil_SetTlbAttributes(0xFFFF0000, 0x14de2);

    //Disable cache on fsbl vector table location
    Xil_SetTlbAttributes(0x00000000, 0x14de2);

    Xil_Out32(CPU1_CATCH, APP_CPU1_ADDR);

	Xil_Out32(XSLCR_UNLOCK_ADDR, XSLCR_UNLOCK_CODE);
	// Assert and deassert cpu1 reset and clkstop using above sequence
	RegVal = Xil_In32(A9_CPU_RST_CTRL);
	RegVal |= A9_RST1_MASK;
	Xil_Out32(A9_CPU_RST_CTRL, RegVal);
	RegVal |= A9_CLKSTOP1_MASK;
	Xil_Out32(A9_CPU_RST_CTRL, RegVal);
	RegVal &= ~A9_RST1_MASK;
	Xil_Out32(A9_CPU_RST_CTRL, RegVal);
	RegVal &= ~A9_CLKSTOP1_MASK;
	Xil_Out32(A9_CPU_RST_CTRL, RegVal);

	// lock the slcr register access
	Xil_Out32(XSLCR_LOCK_ADDR, XSLCR_LOCK_CODE);

	CONTROL_FLAG_ARM0 = 0;
}

And for ARM1:

void init_sharedMemorySegment_FROM1()
{
	Xil_SetTlbAttributes(SHARED_MEMORY_START_ADDRESS,0x14de2);
	sleep(2);

	//xil_printf("DEBUG - AAPv1b - ARM1 - Processor online without debug support\r\n");
}

void wakeUp_System()
{
	while(CONTROL_FLAG_ARM0 == 0){};

	CONTROL_FLAG_ARM0 = 0;

	//xil_printf("ARM1 - Processor started and online\r\n");

	//return XST_SUCCESS;
}

This code is as appear for XAPP 1079.

I use BSP standalone v6.8, which theoretically includes AMP support. AMP flag is asserted for ARM1:

-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -nostartfiles -g -Wall -Wextra -DUSE_AMP=1

The flash file (.mcs) is generated using the "Create Boot Image" widget:

Previous image is the actual image I'm generating.

I saw another extrange bahavior, if the module has been flashed with an SDK2014 generated version (which works properly), both ARM can be used in debug mode. If it is flashed with an SDK2018 generated version (where ARM1 does not start), I cannot relaunch ARM1 in debug mode untill I flash the image compiled with SDK2014.

I'm crazy with this issue, due to it has no sense to me... so any help will be useful. Don't hesitate contacting me if extra information is required.

Thanks in advance.

Regards.