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Contributor
Contributor
563 Views
Registered: ‎01-25-2017

Weird behavior of AXI DMA memory read

Hello, Xilinx Employees,

I am currently implementing AXI DMA Scatter-Gather mode on ZCU104 board.
The data source for this board is the AXI stream module that I built as the below image.figure1.JPG

In this block design, AXI DMA only works in receive mode and has 64bit bus width and 256 burst size.
One DMA transaction size of word is 1000, and 64 cycles of transaction is performed.
Two DMA memories are used in the design and the values of two regions are 0x0130_0000 and 0x0170_0000.

It seems that the data from the data source are stored on the DMA memory correctly.
When I see the data from the memoy monitor of the SDK, sequence numbers are aligned in a correct order as below figure.

figure2.JPG
BUT, when I read a certain memory region(Address = 0x01301F40) on my UART screen, wrong values are read.
As seen above, the read value is 0x3333_3333 and desired value is 0x0000_07d0. 

I don't know why this is happening and I am in severe trouble because of this.
(I have an experience on AXI DMA scatter-gather mode on ZCU102 board and at that time,
the DMA worked perfectly)
Please let me solve this problem.
Thank you.

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4 Replies
Xilinx Employee
Xilinx Employee
497 Views
Registered: ‎02-01-2008

This issue sounds like it is due to cache.

If the cpu writes to the address, then the cache will hold the value written. So the next time the cpu reads the address, it will get the data value from cache and not from the memory where dma has modified the address contents.

So do a cache invalidate before the cpu reads the address.

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Contributor
Contributor
454 Views
Registered: ‎01-25-2017

Hi, Thanks for the reply.

I already tried the cache invalidation as below.

figure3.JPG

I used the cache invalidation function in two locations.

One is in interrupt callback as above and the other is in the main loop.

But the two methods resulted in the same failure.

My methods might be wrong. If you see any fault in the code, let me know that.

(One thing you should notice is that I have successfully implemented the AXI DMA in ZCU102

using the same method described above)

Thanks.

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Xilinx Employee
Xilinx Employee
406 Views
Registered: ‎02-01-2008

Try using xsct, set the target to a53-0 and try to read that memory location. If you get the correct value, then I would take a closer look at your print statement.

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Contributor
Contributor
362 Views
Registered: ‎01-25-2017

Hi, 

I attach the image captured by your description.

figure4.JPG

As seen in the figure, mrd in xsct shows the same result in memory monitor.

My read code is below. Please give me hints. Thanks.

u32 i;

for (i = 0; i < CHUNK_SIZE_IN_BYTE/4; i++)
{
readVal[i] = *(pReadDmaBuffer + i);

if (readVal[i] != i)
{
errCnt++;
NvsDisplayDoPrintf(infoLineCnt++, 0, "Error occurred : 0x%08X, 0x%08X, Addr : 0x%08X", readVal[i], i, (pReadDmaBuffer + i));
break;
}
}

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