05-12-2018 07:21 PM
Excuse me, in the Figure7-3, I am not very clear what the Legacy IRQ/FIQ is. What's the difference between the Legacy IRQ/FIQ and the GIC Interrupt Distributor?
In order to test the Pass-Through Mode, I have enable the CPU0-IRQ and CPU0-FIQ in the Block Design, and according to the Table 7-1, I set the register ICCICR to 0x00000000 or 0x00000008 , however, the two Interrupts can't occur.
when I set the register ICCICR to 0x0000000B, Both the CPU0-IRQ and CPU0-FIQ can occur. So it seems that both the interrupts only can interrupt the CPU0 through the GIC, and the Pass-through Mode doesn't work.
05-12-2018 10:59 PM
Im a Hardware guy, so this is a real simple statement,,
but what I can point you at, is its pure ARM.
Older ARMs , traditional had two interrupts, fast and "not so fast". FIQ basicaly clobbered the IRQ for the sake of speed,
OK, SW guys will LOL, but..
Modern ARM processors, as you have seen, have more complicated interrupts
vector based and all that sort of stuff
Unless the newer interrupts don't do what you want, don't worry.
this might help
05-12-2018 11:09 PM
Thanks for your reply.But I may not enquire the difference between FIQ and IRQ. I just want to know how to generate a legacy interrupt.