I tried building a fir Filter with the ug850-zc702 board and vivado 2016.2. But as the vivado debugging shows the AXI Stream Master of the XADC never sends any data to my AXI Stream Slave Core as it can be seen in the screenshots. The Connection with AXI Lite is working fine and i can read the last Conversion Result. But there is never any data on the AXI Stream Interface.
Has anybody an idea why i am not receiving any data, or what i could be doing wrong?
probably a bit too late, but maybe others are interested.
I had the same problem - everything worked fine (was able to read registers and access xadc via axi) but there was no data on axi-stream. I solved it by connecting the "locked" pin of the clocking wizard to "dcm_locked" pin of Processor System Reset.