10-14-2014 08:58 AM
Hello,
Can you provide an updated version of XAPP1082 which works on Vivado?
Best regards,
Nicolae Rosia.
10-15-2014 06:36 AM
10-15-2014 08:29 AM
Do you have any plans on updating it to Vivado?
11-03-2014 09:12 PM
Given that Vivado is the recommended design tool for Zynq when will XAPP1082 be ported to Vivado?
11-21-2014 09:09 AM
Hello all,
I also would be interested in a updated application note. Did you face any issues in running this example on ZC706?
We are having problems with linkup, it does not go up, even with "ready to test" exaple files.
Kind regards
Piotr Zdunek
Warsaw University of Technology
12-18-2014 11:34 AM
12-21-2014 10:35 PM
The v3.0 of XAPP1082 supporting Vivado 2014.4 will be available soon. The package is awaiting approval and will be in pipeline for web release very soon. There might be some delay in seeing it on Xilinx.com due to holiday break coming in between.
12-22-2014 04:49 AM
Thanks @sunitaj ! I'm pretty sure I have it figured out, but having the reference design will help regardless
12-29-2014 01:38 AM
We are also very keen to see an updated version of 1082 application note. Please let us know when the design will be posted online.
Kind regards
Piotr Zdunek
Warsaw University of Technology
01-09-2015 07:37 AM
Thank you for uploading the new design.
I have one question regarding the design:
GPIO0 via EMIO is used for reseting PCS/PMA core and I can see that the kernel patch that is provided with the design uses this pin. Can an EMIO GPIO be made partially external e.g. can I connect GPIO_0[0:0] to PCS/PMA reset and have GPIO_0[15:1] made external? I know I can do it manually in hdl, but I wonder if it can be done directly in block design.
Kind regards
Piotr Zdunek
Warsaw University of Technology
01-09-2015 12:02 PM - edited 01-09-2015 12:03 PM
01-13-2015 06:50 AM
@stephenm Thanks :)
Have anyone tried to implement u-boot support for PCS/PMA IP Core?
Kind regards
Piotr Zdunek
Warsaw University of Technology
02-16-2016 04:40 AM