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Explorer
Explorer
848 Views
Registered: ‎03-29-2017

ZCU102: With Axi Performance monitor ?

Hi,

I am using ZCU102 board. I am sending the data (data packet) from custom HLS IP to 10G High speed subsystem without using AXI DMA. I am able to monitor the data in Wireshark but i want to measure the performance of the design. So, i have added Axi Performance monitor IP`s block into our design.

The platform used for Performance monitor is XSDK.  While compiling the XSDK, the performance count of each read and write axis its showing "zero". Please anyone guide me how to implement the design with Axi Performance monitor.

I have attached the screenshot what we tried.

 

Perfo_mono_result.png
Per_mon.png
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3 Replies
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Visitor
Visitor
813 Views
Registered: ‎06-29-2018

Hi,

 

If you find the answer please let me know.

 

Thanks

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Xilinx Employee
Xilinx Employee
754 Views
Registered: ‎10-04-2016

Hi @thaus_015,

Neither of the slots on axi_perf_mon_0 are hooked up to an AXI4Lite interface in the block diagam. The AXI Performance Monitor does not have anything to monitor, so the 0 counts are expected.

Regards,

Deanna

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Explorer
Explorer
494 Views
Registered: ‎03-29-2017

https://forums.xilinx.com/t5/AXI-Infrastructure/ZYNQ-Ultrascale-and-Axi-Performance-monitor/m-p/995906#M10901

 

After long days, i am trying to measure performance metrics using APM.

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