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7,982 Views
Registered: ‎12-28-2014

ZYNQ QSPI

Hi,

 

I'm using a Zynq boar d and I want to use QSPI for programming my FPGA. Unfortunately when I try to generate a programming bit file I dont have an access to define SPI_BUSWIDTH (it seems this option and some more other options are not supported for ZYNQ part numbers while for 7 series we have these options). As a result, when I try to generate the mcs file the generated file is base on X1. Moreover, when I try to assign this generated file to PROM iMPACT returns me a warning message:

 

the Datawidth you assigned is x0 but the PROM file (.mcs) is generated in a x1 mode.

 

I think my board can not be initialized from SPI after restarting because of this warning.

 

Please help me if you have the same problem.

 

Thnx

Erfan

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Xilinx Employee
Xilinx Employee
7,977 Views
Registered: ‎08-01-2012

Please verify  the QSPI checklist as per http://www.xilinx.com/support/answers/59174.html

 

What version of tolls are you using? In case of using 2013.3SDK/14.7 Impact tools version refer the below answer http://www.xilinx.com/support/answers/59275.html 

 

 

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Scholar
Scholar
7,970 Views
Registered: ‎11-09-2013

1) x1 x4 bitstream settings do NOT APPLY to zynq family

2) it is not possible or needed to convert BIT to MCS as for FPGA devices

3) zynq can not boot from BIT file, or from BIT file convertted to MCS

 

you have to build BOOT.BIN that if you want can be MCS format but does not have to be

 

you must read more zynq documentation to understand the boot process

 

SPI flashin in zynq is done using mini u-boot,. the tool zynq_flash configures the OCM to be high mapped, then loads u-boot.elf and uses ARM DCC to talk to uboot, and uboot writes to spi flash

 

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7,940 Views
Registered: ‎12-29-2014

Hi Kodali,

 

I checked the check list, everything is fine except

  •  when I try to assign my generated mcs file to the SPI flash it iMPACT returns following warning

The 'Data Width' you assigned is x0 but the PROM file (.mcs) is generated in a x1 mode. Please double check your assignments or it may not work properly.
Click 'Yes' to ignore the conflict and proceed.
Clock 'No' to go back to the dialog.

 

Although, iMPACT is returning this warning I can ignore it and continue programming. iMPACT shows that Program done successfully but when I restart my board with SPI configuration it seems my design wasnt loaded into FPGA. 

 

I tried to read back from the FPGA and save data to a file. By comparing my original file to a readback file I can understand that the program procedure wasn't done successfully cause the files are totally different from each other.

 

If you have any other idea to share I will be thankful.

 

Thnx

Erfan

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7,938 Views
Registered: ‎12-29-2014

Hi Trenz-al,

I generated my mcs file simply. During generating my mcs file there were no option to select x0 or x1 but when I tried to assign this generated mcs file to SPI in iMPACT it return this warning which can be ignored.

The 'Data Width' you assigned is x0 but the PROM file (.mcs) is generated in a x1 mode. Please double check your assignments or it may not work properly.
Click 'Yes' to ignore the conflict and proceed.
Clock 'No' to go back to the dialog.

Although, iMPACT is returning this warning I can ignore it and continue programming. iMPACT shows that Program done successfully but when I restart my board with SPI configuration it seems my design wasnt loaded into FPGA.

I tried to read back from the FPGA and save data to a file. By comparing my original file to a readback file I can understand that the program procedure wasn't done successfully cause the files are totally different from each other.

If you have any other idea to share I will be thankful.

Thnx
Erfan

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Scholar
Scholar
7,912 Views
Registered: ‎11-09-2013

NONONO

 

please, if you use Xilinx 7 series or Zynq, you do not use impact or ISE, please..!

 

impact can in rare cases program the SPI on zynq, but this should not be used or attempted.

 

Vivado 2014.4 - is what you have to use, the earlier the better for you

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Explorer
Explorer
7,847 Views
Registered: ‎11-09-2013

For 7-series parts, the outputs from Vivado for the bitstream are not directly usable. Be it the BIT output, or BIN output, these files can't be used directly -- they require conversion.

 

In ISE, PROMGen would take care of swapping the bit order (IIRC bytes are swapped at the word level; there is some swapping that coours). You can still use PROMGen to make valid bitstream binaries that can be loaded onto a part via PCAP (Zynq) or other methods.

 

In Vivado/SDK, bootgen takes care of that swapping, as well as creating the image header, partition headers, etc.

 

For flashing QSPI, you should just use a programmer to flash the raw BOOT.BIN generated by bootgen. At a minimum, you need the FSBL and bitstream; most applications would throw in U-Boot to boot Linux. The Xilinx tools include a method for flashing QSPI via JTAG as well, but it is slow. As I understand it, a small kernel/executive is downloaded to the PS over JTAG, which in turn handles taking data over JTAG and writing it to QSPI. That kernel is closed source.

 

e: Take a look here: http://lists.denx.de/pipermail/u-boot/2013-May/153156.html

 

You will see several calls to the swap function __swab32() as the code checks if it's a BIT or swapped binary from PROMGen/Bootgen.

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Community Manager
Community Manager
7,816 Views
Registered: ‎07-23-2012

What are the contents of the .mcs file? Does it include a FSBL file?

Did you attempt to program the flash using SDK? If yes, what was the result?

Please refer to UG873 for some help on creating the boot image and programming the flash.
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