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Visitor
Visitor
1,235 Views
Registered: ‎03-29-2016

ZYNQ Ultra:: PCI Serdes instantiation

Hello all,
I am planning to work on Fidus side winger 100 (https://www.xilinx.com/products/boards-and-kits/1-o1x8yv.html) ZYNQ Ultraplus board for PCI gen 4 RTL testing. I will be using my PCI controller + ZYNQ serdes.

I am unable to find serdas IP in VIVAO. There is intergrated block of (PCI GEN3 + serdes) but not seperate serdes. How can I add serdes to my VIVADO project.

 

Thanks,
Raman

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Xilinx Employee
Xilinx Employee
1,072 Views
Registered: ‎02-26-2014

Hi,

 

Try using Xilinx GT wizard for PCIe protocol.

 

Regards,

Ravi

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