ZYNQ multiple AXI DMA system design

[u6113500@anu.edu.au]

Hi all,

I am trying to create a system as shown below

 I want PL to process all sensors, cameras etc. on the maximum  possible speed and save data to the specified address range (and rewriting data when the buffer is full).  PS will be able to read desired data from memory and perform further processing.

Currently, I am testing this architecture with 2 sensors and 2 AXI DMA blocks. The problem that I am facing is that I cant find my data in memory after PL send it there (I specified address range in address editor).

Do you have any idea why is that happening?

Also do you agree with my architecture?

Anton

[madhu.mami60]

Hi u6113500@anu.edu.au

Can you share your block design screeenshot?

AXI_DMA will have stream interfaces, how you have connected them to your interfaces? Are you running the application to handle AXI_DMA? like, DMA configuration, source and destination address settings?

Thanks

Madhu

[u6113500@anu.edu.au]

Hi Madhu,

In this example I am simply trying to send 32'bAAAAAAAA from my IP with AXIS interface.

After I a trying to find this data in corresponding memory location and 32'bAAAAAAAA is not there.

Thank you,

Anton

[u6113500@anu.edu.au]

To receive my data I am running this code (I am using PYNQ Z1)

IP_BASE_ADDRESS = 0x00000000
ADDRESS_RANGE = 0x0FFF

ADDRESS_OFFSET = 0
mmio = MMIO(IP_BASE_ADDRESS, ADDRESS_RANGE)
print(hex(mmio.read(ADDRESS_OFFSET, length=4)))

Basically I am just changing offset and looking for my data