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Observer
Observer
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Registered: ‎12-06-2019

Zynq EMIO inputs appear on outputs

I modify default ZC702 block design to add EMIO port width 64.IMG_20200205_104606_561.jpg

EMIO appears as GPIO_0 on PS block. Connected ILA to EMIO output port and VIO to EMIO inputs. 

Then boot Petalinux 2017.4. 

Then, if I set some pin (number N) in VIO to 1 it appears on output pin (N) I can see in ILA.

I see this effect on exported and not exported pins in Petalinux GPIO sysfs interface.

But according to ZYNQ TRM (UG585) this ports is independent.

 

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