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makiferol
Observer
Observer
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Registered: ‎07-18-2014

Zynq Static Memory Controller 16-bit Parallel Bus Support ?

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Hi, in Zynq overview document ( DS196 ) external memory interfaces are described as;

 

"1GB of address space using singlerank of 8-, 16-, or 32-bit-wide
memories
• Static memory interfaces
• 8-bit SRAM data bus with up to 64 MB support
• Parallel NOR flash support
• ONFI1.0 NAND flash support (1-bit ECC)
• 1-bit SPI, 2-bit SPI, 4-bit SPI (quad-SPI), or two quad-SPI (8-bit)
serial NOR flash"

 

 

First sentence seems to imply support for different data widths. But below, it says only 8-bit SRAM data bus is supported.

 

In technical reference manual ( UG585) the description is like :

 

"NAND Flash Interface
• ONFI Specification 1.0
•Up to a 1 GB device
• 8/16-bit IO width with a single chip select
• 16-word read and 16-word write data FIFOs
• 8-word command FIFO
• Programmable IO cycle timing
• 1-bit ECC hardware with software assist
• Asynchronous memory operating mode
Parallel (SRAM/NOR) Interface
•8-bit data bus width
• One chip select with up to 25 address signals (32 MB)
• Two chip selects with up to 25 address (32 + 32 MB)
• 16-word read and 16-word write data FIFOs
• 8-word command FIFO
• Programmable I/O cycle timing on a per chip select basis
• Asynchronous memory operating mode"

 

So, is it correct that 16-bit wide SRAM-like interface are not supported ? I have several chips with 16-bit parallel bus access.

 

Thanks,

 

Merol

 

 

 

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trenz-al
Scholar
Scholar
3,106 Views
Registered: ‎11-09-2013

correct.

 

If you look in the MIO-at-a-Glance-Table

then you can clearly see that in SMC mode only 8 bit of data is available.

 

View solution in original post

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trenz-al
Scholar
Scholar
3,107 Views
Registered: ‎11-09-2013

correct.

 

If you look in the MIO-at-a-Glance-Table

then you can clearly see that in SMC mode only 8 bit of data is available.

 

View solution in original post

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