Last year, I could create a simple Partial Reconfiguration project
on Zynq (ZC702) by referring to "Partial Reconfiguration Tutorial"
(UG743). Created just one reconfigurable partition and one static.
And used only core0. My standalone application running on core0
would use PCAP to configure and partially reconfigure the PL. It
worked great, so I have frozen that project.
Then I was struggling with using both cores - in AMP mode
(Linux - FreeRTOS) on Zynq. With help from johnmcd of Xilinx,
finally that worked too. Here PL is being configured by Linux.
Or is it by FSBL? Not sure.
Now I want to use PR from within the AMP project. i.e. Ideally,
I want my application running on core1 (on top of FreeRTOS) to
be able to configure and partially reconfigure the PL. Is it possible?
How? Or do I have to write a Linux application on core0 to configure
and reconfigure? Then again, how? Any examples available?
The PR project tool flow was quite different from that of AMP
solution. Don't know how to merge them together. e.g. After
opening the AMP project: how do I tell that I want to use PR
in this project? How do I define partitions? I had written VHDL
code for my reconfigurable modules. How do I bring it into this