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Explorer
Explorer
667 Views
Registered: ‎05-31-2015

Zynq ultrascale interrupt controller registers

Hello,

 

I have started working recently in embedded C in Zynq ultrascale. I want to know the bit by bit definition details of the GICD registers , specifically GICD_SET/CLEAR Enabler0 registers. where can I get this information? It is not there in UG1085. The online Zynq ultrascale register manual says these data is there in Arm Generic Interrupt Controller Architecture Specification 2.0. But there also bit by bit definition is not there.Where can I get this information?

 

Thanks in advance

Shalini K

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3 Replies
Voyager
Voyager
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Registered: ‎08-16-2018

Not in the xil_parameters.h when you create a bsd?

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Explorer
Explorer
650 Views
Registered: ‎05-31-2015

Hello,

thanks for reply.

I will not be working with Xilinx libraries ,in Xilinx SDK. But I want to know the bitwise specification in GICD registers. Which pdf gives these details?

 

Thanks in advance

 

With regards

Shalini

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Voyager
Voyager
637 Views
Registered: ‎08-16-2018

If you want to skip Xilinx stuff then I would ask ARM.

Also, if that info is in the xil_parameters.h, you can just use it, it's not going to change when you use another library or compiler

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