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gulong123
Visitor
Visitor
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Registered: ‎05-11-2019

axi data didth converte problem

recently i met a problem about axi-3 write operation ,the question is:

i send some axi burst frome pl to ps ,and find the wready is low during the debug process.

some information :

in pl ,i receive  ethernet frames ,and divide it into several axi-busrt (in order to meet the axi-3 proctol),the awlen of these bursts are different(1~16); and i do some  axi write operations to send these burst  to ps;

ps : i use an axi data width converter ip to intercontact the  s-axi interface and the m-axi-interface is connected to the hp port

the code and the structure are as follows:

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florentw
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Moderator
380 Views
Registered: ‎11-09-2015

Hi @gulong123 

I assume this is the same error as https://forums.xilinx.com/t5/Processor-System-Design-and-AXI/write-operation-err-when-using-a-axi-data-width-converter/m-p/1119093 right?


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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