04-01-2016 01:05 AM
I didn't find any subject about this.. But if there is one I apologize.
I have problems with my Custom IP (not realy my custom IP but the use of the axi external slave).
I have created an embedded processor (microblaze with, UART, DMA, DDR3 and axi external slave, all in AXI4 burst) when I use the DMA to read or write, everything is okay, but when I try to read or write directly in my custom IP via axi external slave, this one does not pass my request. I use the chipscope to watch what happens and I saw that my custom IP receives no signals whereas with the DMA that work correctly...
I write and read with the Xilinx functions (Xil_Out32 and Xil_In32), I use ISE 14.7 and EDK for the microblaze.
04-02-2016 08:11 PM
Do you have multiple busses in the system? A screenshot of your project and system address map might help here.
A cookie-cutter microblaze system usually have two busses, an AXI lite bus which would have your UART, and the control regsiters for the DMA (slave attachments). Then there is the high performance AXI-4 (burst) bus, which would have the DMA master (that does the actual DMA) and your RAM.
The microblaze processor is usually setup to master both, but only through statically defined address windows for each. So if your peripherals slave attachment is on one bus, but the address range maps to the other (from MBs perspective) then your transactions will be lost.
The defined cacheable region of microblaze define which transactions go to the DC (data-cache) and everything else (except the LMB range) goes to DP (data-peripheral) regions respectively.
04-04-2016 05:49 AM
Thank you for your answer, here are the screenshots of my system with their adress map.
Everythings work except the direct tranfert to my IP. In SDK I've disabled the cache.. Don't know if it's important...