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Adventurer
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Registered: ‎02-06-2008

custom logic bidirectional PORT

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I can not seem to activate a bidirectional PORT in my custom logic. Inputs and outputs are working fine. This is a microblaze project. What should I look for?
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Contributor
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Registered: ‎06-22-2009

Re: custom logic bidirectional PORT

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I have a suspicion that the tristate control is active low.

 

I would suggest inferring a tristate in the VHDL using the asynchronous statement is an easier method.

 

bdir_out <= out WHEN t_enable = '1' ELSE "Z"; construct.

 

Best wishes

Peter

Message Edited by flitch@mbda on 09-25-2009 09:14 AM

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Historian
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Registered: ‎02-25-2008

Re: custom logic bidirectional PORT

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forte31 wrote:
I can not seem to activate a bidirectional PORT in my custom logic. Inputs and outputs are working fine. This is a microblaze project. What should I look for?

A bidirectional port MUST connect to an FPGA pin. It cannot connect to other internal logic.

----------------------------Yes, I do this for a living.
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Adventurer
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Re: custom logic bidirectional PORT

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Are you saying I can not have logic control a FPGA pin if it is part of a microblaze design?
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Registered: ‎02-25-2008

Re: custom logic bidirectional PORT

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forte31 wrote:
Are you saying I can not have logic control a FPGA pin if it is part of a microblaze design?

No, I am saying that the ONLY bidirectional signal that you can control with a MicroBlaze MUST be an FPGA pin.

----------------------------Yes, I do this for a living.
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Adventurer
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Re: custom logic bidirectional PORT

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I am trying to control the pin through my logic that is now an IP core in the microblaze design. I have done this with inputs and outputs successfully. I can not control the bidir pin at all. I have the following code in the user_logic.vhd:

 

MUTE_IO_PIN_T <= '1';

muteio_in <= MUTE_IO_PIN_I;
MUTE_IO_PIN_O <= '0';

 

I do not see a logic low on the pin as I would expect. Could there be another file that is not set up correctly? 

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Contributor
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Registered: ‎06-22-2009

Re: custom logic bidirectional PORT

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I have a suspicion that the tristate control is active low.

 

I would suggest inferring a tristate in the VHDL using the asynchronous statement is an easier method.

 

bdir_out <= out WHEN t_enable = '1' ELSE "Z"; construct.

 

Best wishes

Peter

Message Edited by flitch@mbda on 09-25-2009 09:14 AM

View solution in original post

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Contributor
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Registered: ‎06-12-2009

Re: custom logic bidirectional PORT

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Yes, the tri-state control line is active low.

 

I created a custom peripheral a few weeks ago to interface to an FTDI FT245 USB chip that has an 8-bit bidirectional port, and it works well.  Here are a few snippets.  The tri-state I/O must be at the top level in your custom core.  To do this, I put a few lines in the MPD file for the custom core as follows,

 

## Ports
PORT ft245_data = "", DIR=IO, VEC=[7:0], THREE_STATE = TRUE, TRI_I = ft245_din, TRI_O = ft245_dout, TRI_T = ft245_dtri
PORT ft245_din = "", DIR = I, VEC = [7:0]
PORT ft245_dout = "", DIR = O, VEC = [7:0]
PORT ft245_dtri = "", DIR = O
PORT ft245_rd = "", DIR = O
PORT ft245_wr = "", DIR = O

 

When Platform Studio sees this, it will create the tri-state I/O logic. At lower levels, in your code, input and output are handled as seperate busses.  For example, in the top level file I have,

 

ft245_din      : in    std_logic_vector(7 downto 0);
ft245_dout    : out   std_logic_vector(7 downto 0);
ft245_dtri      : out   std_logic;
ft245_rd        : out   std_logic;
ft245_wr       : out   std_logic;

 

And in the next level below that (in user_logic.vhd) I have (looks the same),

    

ft245_din         : in   std_logic_vector(7 downto 0);
ft245_dout       : out  std_logic_vector(7 downto 0);
ft245_dtri         : out  std_logic;
ft245_rd           : out  std_logic;
ft245_wr          : out  std_logic;

 

And finally, in the MHS file, I have

 

PORT usb_0_ft245_data_pin = usb_0_ft245_data, DIR = IO, VEC = [7:0]
PORT usb_0_ft245_rd_pin = usb_0_ft245_rd, DIR = O
PORT usb_0_ft245_wr_pin = usb_0_ft245_wr, DIR = O

Hope this helps,

 

Jim

 

 

 

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Visitor
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Registered: ‎01-06-2009

Re: custom logic bidirectional PORT

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Jim at some point we will need to make an interface to an FTDI FT2232HQ chip via a similar 8-bit bidrectional port.We're leaving this work for the future when we hope to get smarter.

 

Could you post or send us your custom IP core? It would be a good starting point for our future development of this USB interface. Thanks.  

 

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Registered: ‎06-12-2009

Re: custom logic bidirectional PORT

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The custom IP core interface is fairly straightforward, the only tricky part was "wait states" to slow the timing down to meet the specs of the FTDI FT245 read and write strobes, and handshaking lines. Basically I use a counter to tick off a few 50MHz bus clocks and when the proper time is reached I strobe the IP2Bus_RdAck (or write ack) to end the bus cycle.

 

I originally looked at using the Xilinx IP core "XPS External Peripheral Controller" but decided it was overkill, plus it looked sort of big in terms of LUT usage. 

 

My company is really paranoid about source code, but if you want I will be glad to look at your VHDL or Verilog code when you get something written.

 

Jim

 

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Registered: ‎01-06-2009

Re: custom logic bidirectional PORT

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I understand how some can be paranoid about source code.

 

Your offer to review our code is even better, as our interface will need to be a little different for our chip anyway. Having your debugging help would be great!

 

It may be a couple months before we get back to this, however. We're working on getting the rest of our system together to get a product out in a few weeks. We'll just use RS232 for now and come back to the USB interface later.

 

Thanks very much for you offer. We'll be back.

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Contributor
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Registered: ‎06-22-2009

Re: custom logic bidirectional PORT

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Hi,

 

Jim's instructions on how to implement tristates in EDK are correct.

These can only be at the top level.

 

This tool seems to have taken a backwards step from defining them in VHDL, where at least you can simulate them easily and not worry about the tristate control polarity!

 

When you connect it up in the PORTS screen you need to leave the _O, _I, and _T versions unconnected, and only connect the tristate one (auto generated but defined in the .mpd) to the external pins.

It handles busses OK. For the .ucf the bus bits are defined with diamond brackets, thus <1>.

 

Hope this helps.

 

Best wishes

Peter

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