I am trying to debug my design which will write to and read data from ddr3 through ZYNQ7 PS in VIVADO 2018.2 tool.
But I am getting inactive status for AXI data transaction in window dashboard after programming zed board even I got AXI data transaction waveforms in SIMULATION.
SO I am not getting any resolutions for that, I set the constraints for primary clock to y9 pin.
Please help by providing solution.
Thanks in advance.