12-28-2015 09:36 AM
I want to modify the memory conytroller(axi_s6_ddrx) generated from MIG in ISE after exporting to the design I have made in XPS.But I am stuck on the error below. I have tried but nothing fits as a solution.My design contains inout ports.Note I am importing the complete memory controller fron ISE alongwith the ngc files.Any information would be of great help.
I am getting the follwing errors
ERROR:NgdBuild:455 - logical net
ERROR:NgdBuild:924 - input pad net
'microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout<0>' is driving
12-28-2015 08:46 PM
this is a problem with integration of your edk subsystem with ise. you should follow the procedure given in http://www.xilinx.com/support/documentation/sw_manuals/xilinx11/edk_ctt.pdf
12-28-2015 10:17 PM
I have followed the exact steps. It is still not going.Can someone please explain the error?. i am stuck here from last month and hav tried almost everything.
12-29-2015 01:10 AM
how are you integrating the memory controller? rather than configuring the memory controller in ISE, can you use Base System Builder wizard to add the memory controller?
12-29-2015 08:45 PM
first of all I do not want to add mcb in BSB as I want to add it as my customized IP
I have followed the following steps:
1)Generated MCB from ISE
2)Creted IP in xps
3)Imported the IP and added the .v(of ddr2 generated in ISE) and modified .mpd and .pao.