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vadlamudianil
Adventurer
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Registered: ‎11-02-2014

ipic signals in master

Hi Everybody,

 

I want to interconnect my IP with ZYNQ so i need IPIC signals,

 

could anyone tell me the procedure how to generate master code IP with IPIC signals in VHDL

 

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sampatd
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4,753 Views
Registered: ‎09-05-2011

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vadlamudianil
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Registered: ‎11-02-2014

Thanks for reply,

 

i need axi master burst code with IPIC signals, is that xilinx provide freely or do i need to buy master burst

 

if no need to buy mastrer burst, is there any procedure to generate code with IPIC signals

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sampatd
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Registered: ‎09-05-2011

I think the following AR has some templates available that you can use:
http://www.xilinx.com/support/answers/37425.html
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vadlamudianil
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Adventurer
4,684 Views
Registered: ‎11-02-2014

Thanks for the reply,

 

The link you have provided to me, it is about VHDL AXI4-Stream master/slave example

 

but i am asking about VHDL IPIC MASTER BURST CODE, Please tell me is it available or do I need to buy licence.

and if available please provide the link

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