08-06-2020 08:23 AM - edited 08-06-2020 08:28 AM
I am working on a project with Zynq® UltraScale+ ZCU104 board.
I want to send images from PS to PL, and do the computation in PL. In the end, send the image classification result back to PS.
I can only build the block which can send data from PL to PS (using AXI DMA). But I don't know how to finish the PS-to-PL part.
If you have any idea about how to alter the design, please let me know.
Thank you everyone.
My block design as below (the orange block is my custom IP):
09-04-2020 02:14 AM
09-04-2020 06:36 AM
As @florentw mentioned, you can use the AXI DMA to read and write data to the DDR. The AXI DMA has two channels. One for reading from DDR (MM2S). One for writing to DDR (S2MM). In your design, open the AXI DMA to reconfigure it. Enable the Read channel (MM2S). From there the AXI DMA will provide a new port that you can connect to the the S_AXIS port on your IP.