04-22-2019 03:36 AM
Hi firstname.lastname@example.org ,
Like Zynq-7000 device in Zynq US+ L2 SCU arbitrates L2 request between cores.
04-22-2019 06:07 PM
Lockdown can be done as specified in section D.4.4.10 of
It is "implementation defined" and I didn't see anything related to this in the UltraScale+ Register Map (lots of registers so I may have missed it).
@pvenugo : you've indicated the SCU handles this. Could you pinpoint the registers to set up as they are not A53 native?