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Advisor
Advisor
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Registered: ‎10-10-2014

use PS_POR_B or PS_SRST_B to reset external peripheral ic's

I'm working on a schematic using a Zynq UltraScale+, and I'm wondering how to properly reset any external peripherals like ethernet phy, usb phy, ...

I checked the ZCU102 schematics as well as Avnet EV SOM/Carrier card:

* ZCU102 uses PS_POR_B to reset ethernet and usb phy's. I think this allows 'not' to reset the external peripherals when a JTAG debugger asserts SRST (?)

* Avnet EV SOM/Carrier use an and-gate to combine both PS_POR_B and PS_SRST_B : this means that external ethernet phy and usb phy are always reset, at power-on, but also when a debugger drives SRST

I tend to use the method like on ZCU102, but just wondering why Avnet didn't do this .. any advantage/disadvantage on either method?

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Xilinx Employee
Xilinx Employee
461 Views
Registered: ‎09-01-2014

On ZCU102, by default, USB PHY ULPI reset is connected to the PS_MODE1 pin. USB PHY reset in done in FSBL code and the latest version moved it to the psu_init.

https://github.com/Xilinx/embeddedsw/commit/c258818de03f7b7a0aa62aae9488c24b57ab4215#diff-2994d94142915a72d2b1973d5e00c3b3
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