I need an IP from Microblaze that will drive my register block by below signals.
wr enablerd enable (optional)
-Register block includes 20 x 16 bit registers; in FPGA cells not in block rams.
-Register block is not under Microblaze but under Top.vhd and used by other FPGA blocks
-Frequency of the block is not important!
-Spartan 6-100 with Planahead 14.6 is used in the design