11-10-2020 02:16 AM - edited 11-10-2020 02:19 AM
I'm confused about the potential use of software interrupts in a dual core 7020. the TRM indicates that irqs 0-15 can be used for interprocessor interrupts but xscugic.c says only use sw interrupts when the controller is started in simulation mode? what does this mean?
i am currently using a gpio in the fpga connected to the 2nd pl->ps interrupt, so that cpu0 can interrupt cpu1 by simply raising and lowering the gpio, but it feels like a cludge.
11-12-2020 10:45 AM
Any comment from Xilinx?
the GIC driver software is a mess and the documentation is sketchy.
i know that being a hobbyist with a single dev board makes me easy to ignore, but your software is buggy and the bugs make it much harder to learn how to use these really amazing chips.
11-12-2020 08:27 PM
@Rmccarty it's always preferable to look at ARM documentation instead of a second source interpreting it. For the GIC it's that doc:
FYI, the SW interrupts can only be raised by software and not by external events; that's about the only difference with the other interrupts numbers. Other interrupts can also be raised by software by setting a bit in the appropriate register.