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younggeun
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Registered: ‎12-21-2020

zynq from pl ddr to ps ddr by dma

I have a plan to implement that zynq ultrascale+ access for reading data from PL ddr4 and writing that datas to PS ddr4 by dma.

PL DDR4(reading data) ==> DMA Engine(mover) ==> PS DDR4(writing data)

Could somebody recommend the architecture or example to refer before implementing in xilinx ?

I have a zcu111 for a kit.

 

Thanks 

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