09-25-2015 03:04 AM
How many USB controllers does this device have? (7010, CLG400)
According to UG585:
USB Controllers: Each as Host, Device or OTG (Two)
MIO pins only (one USB controller is available in the 7x010 device) [ eh ???? ]
and then in DS190 (product overview) *all* 7000 devices have 2 x USB.
So how many is it... 1 or 2? Does anybody know?
Is anyone using both USB0 and USB1 in a 7010 device?
09-25-2015 07:31 AM
But you have to access one of them using programmable logic IO pins, through the extended IO (EMIO) of the processor system.
In other words, you run out of MIO pins, and need to 'borrow' some FPGA fabric IO pins.
One may also add many more USB contollers as soft IP cores, with addional AXI inrefaces to also talk to the ARM processor cores.
09-25-2015 08:15 AM
Thanks for the quick response Austin!
But according to UG585, the usb is not accessible via EMIO, only the port indicator signals.
e.g. see Figure 5-6
There is no mention anywhere of usb ULPI-PHY EMIO interface.
--> 12 ULPI PHY signals via MIO pins.
--> 4 signals per controller via EMIO.
"The ULPI signals flow through the MIO. There are sideband signals (port indicators and power controls) that flow through the EMIO"
?? Can you point me to the relevent section in UG585, because I can't find it.
It seems that EMIO <-> USB is not supported.
So... on a 7010 device is USB1 available ... or not ? And if it is how can I get to it?
09-25-2015 09:46 AM
Yes, the USB Phy is needed as the interface pins are not able to be connected to general purpose IO.
So, you have one USB with a USB phy. The other USB can still be brought out, but using the logic level IO, to IO pins of the FPGA, and then to an external phy device.
Sorry about that, I forgot USB needs either its own special IO pins, on a physical interface device to convert IO to the pins needed for the standard.
09-25-2015 11:02 AM
"The other USB can still be brought out, but using the logic level IO, to IO pins of the FPGA, and then to an external phy device"
But this is simply not possible for USB. Peripherals are connected to PL via EMIO. There is no EMIO connection between USB-PS and the PL.
USB-PS-PHY-signals ---> EMIO ---> PL is not possible (for USB)
See this post from 2012 from rembry:
"Most of the PS IOPs can be routed to either MIO or EMIO (exceptions include USB, SMC, Quad-SPI, SD -- which are only available on MIO). Routing is shown in section 2.5 of TRM v1.3."
So... if USB1 is not connected to MIO (on a 7010) and it is not possible to access it via PL-EMIO how should I connect an external PHY?
Or is UG585 wrong about the 7010 and USB connectivity...
09-26-2015 09:39 AM
09-26-2015 09:53 AM - edited 09-26-2015 10:03 AM
in ug585 v1.1 section 15.1.9 it says: "Only one USB interface is available in the 7z010 CLG225 device"
This is almost definitely correct because this package has fewer MIO pins than others. So one can use either ethernet or USB. It is also very likely (and somewhat irrelevant :-) that the die is the same but only fewer pins are bonded out.
This is also not an issue for you because you are using the CLG400 package not the CLG225 package. In this package all MIO pins exist (or they use the same die and all pins are simply bonded out) and you can use both USB controllers.
USB doesn't support EMIO so if you want two USB interfaces you need to use a lot of MIO pins.
You also need to connect either (or both) USB controller to a USB PHY which the Zynq chip doesn't have. You use ULPI to talk to a USB PHY.
09-28-2015 09:43 AM
I agree about the CLG225 package (some MIO pins are not bonded out)
But acording to UG585, section 1.2.3,
"MIO pins only (one USB controller is available in the 7x010 device)"
There is no mention of the CLG225 package here... I assume the package qualifier is missing... probably.