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Observer mahkoe
Observer
178 Views
Registered: ‎02-08-2019

AXI DMA reads incorrect values on SG bus, connected to Zynq HPC0

On an AXI DMA, I have connected the AXI Master output for scatter gather (M_AXI_SG) to a slave on the Zynq (S_AXI_HPC0_FPD).

 

I am probing this bus with an ILA, and I see this:

axidma_badread.png

On the read bus, I notice that it is reading the same value multiple times, then zeroes for a few more flits. This is not correct.

I have tried to get Linux to flush the cache using fluch_cache_range in a little kernel module I wrote. No luck.

Does anyone know what's soing on?

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Observer mahkoe
Observer
124 Views
Registered: ‎02-08-2019

Re: AXI DMA reads incorrect values on SG bus, connected to Zynq HPC0

I just managed to find this (unresolved) forum post:

https://forums.xilinx.com/t5/AXI-Infrastructure/AXI-Slave-HP-Port-on-PS/td-p/832733

The poster is having the exact same problem I'm having. I wasn't able to reply on that post for some reason.

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