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Visitor
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Registered: ‎02-04-2020

AXI DataMover (5.1) no m_axis_mm2s_tlast

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I'm using AXI Datamover (5.1) to transmit data from memory to the data stream

the Datamover IP receives m_axi_mm2s_rlast from the memory interface but it never outputs m_axis_mm2s_tlast to the AXI stream interface.

is there any settings to enable this signal?

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Re: AXI DataMover (5.1) no m_axis_mm2s_tlast

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Hi @hcha30 ,

I wanted to check: the command data that is shown in the waveform is not the actual command you sent, correct? It's just data left over on the bus?

The reason I ask is that the m_axis_mm2s_cmd_tdata isn't qualified with a tvalid and I just wanted to make sure that the command it properly formatted. For a 2560-bit transfer, I'd expect the command to look something like this: 72'h00_8000_0000_4080_0140.

The key thing is that the EOF bit (bit 30) is set in the command. This will cause TLAST to assert at the end of the transfer.

Regards,

Deanna

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Re: AXI DataMover (5.1) no m_axis_mm2s_tlast

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Hi @hcha30 ,

Could you post a trace of what you are seeing? I need to see the following interfaces: the MM2S command path, the MM2S status path, the MM2S AXI4 read path and the MM2S AXI4-Stream path.

TLAST may not assert when RLAST occurs. This is because the MM2S bytes to transfer may span across multiple reads on the M_AXI_MM2S interface. The number of reads it takes to collect all of the BTT data is a function of the maximum burst length (set in the configuration GUI) and the datawidth of the M_AXI_MM2S interface.

Regards,

Deanna

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Visitor
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Registered: ‎02-04-2020

Re: AXI DataMover (5.1) no m_axis_mm2s_tlast

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image.pngimage.pngimage.png

the command was to move 2560 bits from the memory to the AXI Stream. 

so if you look at m_axi_mm2s_rdata, you can see  5  512bit transactions

and m_axis_mm2s_tdata,  20  128bits transactions.

m_axi_mm2s_rlast pulse comes out with the last m_axi_mm2s_rdata

but there is no m_axis_mm2s_tlast pulse

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-04-2016

Re: AXI DataMover (5.1) no m_axis_mm2s_tlast

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Hi @hcha30 ,

I wanted to check: the command data that is shown in the waveform is not the actual command you sent, correct? It's just data left over on the bus?

The reason I ask is that the m_axis_mm2s_cmd_tdata isn't qualified with a tvalid and I just wanted to make sure that the command it properly formatted. For a 2560-bit transfer, I'd expect the command to look something like this: 72'h00_8000_0000_4080_0140.

The key thing is that the EOF bit (bit 30) is set in the command. This will cause TLAST to assert at the end of the transfer.

Regards,

Deanna

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Visitor
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Registered: ‎02-04-2020

Re: AXI DataMover (5.1) no m_axis_mm2s_tlast

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I was missing the EOF bit in the command. thanks for the help!

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