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Registered: ‎02-12-2015

AXI Peripheral sampling Camera data pixel clock



I have external data coming in to my board on an 80MHz pixel clock.


The aim is to store this data in lines and make it available to Zynq processors using a DMA controller.


I thought the best way to do this would be to make an AXI slave peripheral that could sample the data and then connect this to an AXI interconnect which is also connected to a DMA controller and maybe a bram controller...


I will look into how to get the data from the slave peripheral to storage later but my question is, is the S_AXI_CLK fast enough to sample the pixel data which is coming in at 80MHz?


If so, I guess I will need some registers to solve clock domain crossing - should I set the AXI read valid signals according to my pixel valid signals and then just set my pixel data onto the slv_reg's ?


Any ideas / comments would be gratefully received. 


Many thanks



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