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1,687 Views
Registered: ‎05-13-2016

AXI Slave Read/Write registers not working

I have added a couple of CDMA cores to my AXI design. They show up in the address editor as CDMA0 at address 44A30000 and CDMA1 at address 44A40000.  It took several tries of resetting the IP output products and re-implementing the design before these CDMAs show up in the BSP xparatmeters. h file.  I also had to manually edit the MSS file to add the drivers.

 

I am not even trying to use the drivers at this point, but simply banging on the registers directly with

Xil_Out32( Data2Write, Address) and Xil_In32(Address), as follows;

 

//Data2Write = CDMA_ENABLE_INTR

Data2Write = 0xFFFFFFFF;

Address = (u32)(Base_Address + CDMA_CDMACR_OFFEST);

cc_printf("Enable Interrupt, writing %08x to address %08x\n\r", Data2Write, (Base_Address + CDMA_CDMACR_OFFEST));

Xil_Out32( Data2Write, Address); // Reset the DMA

if(Readback != Data2Write){

     cc_printf("DMA_Init error reading control register - Read %08x, expected %08x\n\r\n\r", Readback, Data2Write);

}

 

Here is a debug print out

Init CDMA0 - Select base address 44A30000
Resetting CDMA, writing 00000004 to address 44A30000
CDMA read back after resetRead 00000000
Enable Interrupt, writing FFFFFFFF to address 44A30000
DMA_Init error reading control register - Read 00000000, expected FFFFFFFF

 

 

I have looked at the schematic of the implemented design, and it at least shows the address lines going to the cores. I have not checked all connections, to see if something got optimized out.

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com 

Many of the bits in the CDMACR register are read-only. See page 15 on PG034

https://www.xilinx.com/support/documentation/ip_documentation/axi_cdma/v4_1/pg034-axi-cdma.pdf

Also in your test I do not see where Readback is initialized.

 

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Yes, you are correct on both counts, but still the same issue. I do not see any of the bits get set, after fixing up my read in this latest debug code.

 

Here is the revised code.

 

Data2Write = CDMA_RESET;

Address = (u32)(Base_Address + CDMA_CDMACR_OFFEST);

cc_printf("Resetting CDMA, writing %08x to address %08x\n\r", Data2Write, Address);

Xil_Out32( Data2Write, Address); // Reset the DMA

 

Readback = Xil_In32(Address);

cc_printf("CDMA read back after reset - Read %08x\n\r", Readback);

 

 

//Data2Write = CDMA_ENABLE_INTR;

Data2Write = 0xFFFFFFFF;

cc_printf("Enable Interrupt, writing %08x to address %08x\n\r", Data2Write, (Base_Address + CDMA_CDMACR_OFFEST));

Xil_Out32( Data2Write, Address); // Reset the DMA

Readback = Xil_In32(Address);

if(Readback != Data2Write){

cc_printf("DMA_Init error reading control register - Read %08x, expected %08x\n\r\n\r", Readback, Data2Write);

 

}

 

Here is the print out

 

Init CDMA0 - Select base address 44A30000
Resetting CDMA, writing 00000004 to address 44A30000
CDMA read back after reset - Read 00000000
Enable Interrupt, writing FFFFFFFF to address 44A30000
DMA_Init error reading control register - Read 00000000, expected FFFFFFFF

 

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com The CDMA reset mask is 0x4. To check for reset done, you should read CDMA_CR_OFFSET and AND the result with 0x4 until is becomes nonzero. 

I'd suggest using the SDK and looking inside the standalone drivers for proper initialization sequence. 

I do always this - include the hardware I want in the design, build the bitfile, start SDK and create a "Peripheral Test" project in the SDK. Then follow the rabbit hole learning the ropes.

 

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test_peripherals_sdk5.png
test_peripherals_sdk4.png
test_peripherals_sdk.png
test_peripherals_sdk2.png
test_peripherals_sdk3.png
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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Sorry, but that is not what the documentation states, regarding reset in progress.  I am writing a 00000004 to the base address with an offset of zero, so I am writing to the control register.  The documentation shows that a on readback, a zero (not non-zero) value indicates the reset is not in process, but that the device is in normal operation. Originally,  I had not reset the device and just tried writing to the control register, and I got all zeros back.  I am suspecting that there is something with the AXI Interconnect not decoding things, and that is why I am always getting zeros back when I read from this space.  Again, the tools were not initally generating the xparameters file with the CDMAs in there.

 

cmda_reset.jpg

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Actually, if you look at the resetisdone() code, the comments do not agree with each other. In one place it says the return is one when it is done, and the other says that it is not done.

 

/*****************************************************************************/
/**
* This function checks whether the hardware reset is done
*
* @param InstancePtr is the driver instance we are working on
*
* @return
* - 1 if the reset has finished successfully
* - 0 if the reset is not done
*
* @note None.
*
*****************************************************************************/
int XAxiCdma_ResetIsDone(XAxiCdma *InstancePtr)
{

/* If the reset bit is still high, then reset is not done
*/
return ((XAxiCdma_ReadReg(InstancePtr->BaseAddr, XAXICDMA_CR_OFFSET) &
XAXICDMA_CR_RESET_MASK) ? 0 : 1);
}

 

 

In either case it does not matter. I am not using the driver but am reading and writing directly to the control register ( or trying to, but the hardware is not cooperating)

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com 

That is exactly what the documentation states. You have to poke a "1" in that specific bit in the control register. That means writing 0x4 to the register, not 0xFFFFFFF as you were trying to do previously.

The SDK reverses the output because of the unix definition (zero for success). If the register bit is nonzero, it returns zero. Otherwise, if the register is zero (not done), it returns one. It is pretty clear in the ternary question mark operator. This is not contradictory.

 

 

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

So lets back up.  Originally I was not writing a reset, I was just setting the interrupt bit to a 1. So I was writing 0000100 to the control register.  That is all. After setting the control register to enable the interrupt, I saw that I was never getting the interrupt.  I added a read back of this control register to my code (before adding any reset code) and it was coming back as all zeros.  That is when I changed the write to the register to all F's to see if it would have any effect.  That was probably not a good idea, since it steps on the rest bit.

 

So, revising things, here the first block does a reset.  When it reads back, the reset bit is a zero, so the reset is complete (though no test to make sure its a zero).  The second snippet, enables the interrupt.  When I do the read back, I get all zeros. Thus the interrupts are not being enabled.  

 

Code

Data2Write = CDMA_RESET;
Address = (u32)(Base_Address + CDMA_CDMACR_OFFEST);
cc_printf("Resetting CDMA, writing %08x to address %08x\n\r", Data2Write, Address);
Xil_Out32( Data2Write, Address); // Write to the CMDA register
Readback = Xil_In32(Address);
cc_printf("CDMA read back after reset - Read %08x\n\r", Readback);

 

Data2Write = CDMA_ENABLE_INTR;
cc_printf("Enable Interrupt, writing %08x to address %08x\n\r", Data2Write, Address);
Xil_Out32( Data2Write, Address); // Write to the CMDA register
Readback = Xil_In32(Address);
if(Readback != Data2Write){
cc_printf("DMA_Init error reading control register - Read %08x, expected %08x\n\r\n\r", Readback, Data2Write);
}

 

Output

Init CDMA0 - Select base address 44A30000
Resetting CDMA, writing 00000004 to address 44A30000
CDMA read back after reset - Read 00000000
Enable Interrupt, writing 00001000 to address 44A30000
DMA_Init error reading control register - Read 00000000, expected 00001000

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com

On the second read, you have to loop and wait for the 1. It does not come right away.

That said, I would suggest using the driver as much as you can - it is the only vetted/supported way. 

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

The CDMA comes up in a know, defined state. If I write directly to the hardware using the Xil_Out32() to the address specified in the address map, with the proper offset (zero), I am supposedly writing to the control register.  This is the simplest way to exercise the hardware, with no ambiguities, nothing else in the way.  If I set the interrupt enable to a 1, and when I read back and get a zero (again not touching the reset bit at all), something is wrong at the hardware level.

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com 

It is possible but very unlikely. This is a very popular IP and it has been used for many many years in production.

My SDK test works. Yours, using your own logic, fails. What are the odds?

 

 

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Eliminating the reset from the equation....

 

Code

Address = (u32)(Base_Address + CDMA_CDMACR_OFFEST);
Data2Write = CDMA_ENABLE_INTR;
cc_printf("Enable Interrupt, writing %08x to address %08x\n\r", Data2Write, Address);
Xil_Out32( Data2Write, Address); // Write to the CMDA register
Readback = Xil_In32(Address);
if(Readback != Data2Write){
cc_printf("DMA_Init error reading control register - Read %08x, expected %08x\n\r\n\r", Readback, Data2Write);
}

 

Output

Init CDMA0 - Select base address 44A30000
Enable Interrupt, writing 00001000 to address 44A30000
DMA_Init error reading control register - Read 00000000, expected 00001000

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com You can't use the CDMA IP without resetting it state. There is a sequence involved.

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Not according to the CDMA documentation, well other than the IDLE bit. I will look at the IDLE bit, to make sure it is idle.

 

programming_seq.jpg

 

 

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com this is to setup the transfer - after initialization.

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

Just to be clear, I am not using SG, but am using it in the simple mode.  I do not plan on using the Xilinx drivers.  It certainly seems like I should be able to read and write to the control register, especially right after power up, when there has been no other activity to the CDMA. Or any other of the registers.  This is a basic hardware verification that I can talk to the registers.

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com

>  I do not plan on using the Xilinx drivers.  

I strongly recommend to use the Xilinx drivers, until at least you get the hang of how it works. 

Right now you are misinterpreting the docs, making mistakes, issuing the wrong sequences and blaming the hardware.

It is not a good use of anybody's time.

 

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

I have dozens of peripherals working and I am able to talk to the registers using this simple method without issue to verify basic connectivity, as will as controlling them at a higher level from FreeRTOS!  The fact that the tools did not update the xparameters.h file is what is making me suspect the hardware. Going from the hardware's default state, I should have been able to just set the IRQ_enable bit.  It does not read back as expected.  I am adding a debug core to the hardware to verify that the AXI Interconnect is correctly implemented.  We have seen these not update correctly in the past.

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

I am not questioning the IP.  I am questioning that the AXI interconnect  is not built right, and that the decode is not doing what is expected.  We have seen this in the past. You have ignored the comments about the xparameters not being generated.  How is one to have faith in the hardware when something like this happens

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Registered: ‎03-22-2016

Re: AXI Slave Read/Write registers not working

paul.gigliotti@coachcomm.com Yes, indeed I ignored that comment - it was somewhat buried into the bigger issue.

Would you do me a favor then? Create a main.c with the code that fails and post it here. I know you have posted snippets but they were full of typos (eg your code read CDMA_CDMACR_OFFEST instead of CMDA_CR_OFFSET).

I already have a design that I made especially for testing with this post. I will take it, run on my side and we exchange notes. How does it sound?

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Registered: ‎05-13-2016

Re: AXI Slave Read/Write registers not working

I appreciate the input and your willingness to help.  It would be great to see if my code works on your hardware.  BTW,  since I am not using Xilinx's drivers, I used my own defines and they may not match those that you were expecting. See DMA_MemCopy.h (shown below). Files attached

 

#ifndef SRC_DMA_MEMCOPY_H_
#define SRC_DMA_MEMCOPY_H_


#define  CDMA0_ADDRESS XPAR_MEMORY_SYSTEM_AXI_CDMA_0_BASEADDR
#define  CDMA1_ADDRESS XPAR_MEMORY_SYSTEM_AXI_CDMA_1_BASEADDR


#define CDMA0 0x0001
#define CDMA1 0x0002

#define CDMA_CDMACR_OFFEST   0x00000000  //CONTROL
#define CDMA_CDMASR_OFFEST  0x00000004  //STATUS
#define CDMA_CURDESC_OFFEST  0x00000008  //CURRENT DESCRIPTOR
#define CDMA_CURDESC_MSB_OFFEST 0x0000000C
#define CDMA_TAIL_OFFEST   0x00000010  //TAIL DESCRIPTOR
#define CDMA_TAIL_MSB_OFFEST  0x00000014
#define CDMA_SA_OFFEST    0x00000018  // SOURCE ADDRESS
#define CDMA_SA_MSB_OFFEST   0x0000001C
#define CDMA_DA_OFFEST    0x00000020  //DESTINATION ADDRESS
#define CDMA_DA_MSB_OFFEST   0x00000024
#define CDMA_BTT_OFFEST   0x00000028   //BYTES TO TRANSFER


#define CDMA_IDLE    0x00000002
#define CDMA_RESET    0x00000004
#define CDMA_ENABLE_INTR  0x00001000
#define CDMA_CLEAR_INTR   0x00001000

void DMA_Init(u16 DMA_Number);

void DMA_MemCopy(void* Destination, void* Source, int Bytes_to_Transfer);
void Test_DMA_Task(void *pvParameters);

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