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Newbie
Newbie
218 Views
Registered: ‎08-04-2017

Burst mode UART with custom FIFO and interrupt

Hi,

I imagined a system where the UART lite would be connected through a custom generated FIFO to the AXI Interconnect and the FIFO's partially full signals would be used to signal an interrupts.

Is this at all possible, or do I have to use a DMA engine?

Thank you

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Teacher
Teacher
205 Views
Registered: ‎07-09-2009

Re: Burst mode UART with custom FIFO and interrupt

dosn't the Uart lite already have a fifo in it and an AXI interface,
why do you need more ?

https://www.xilinx.com/support/documentation/ip_documentation/axi_uartlite/v2_0/pg142-axi-uartlite.pdf
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Newbie
Newbie
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Registered: ‎08-04-2017

Re: Burst mode UART with custom FIFO and interrupt

It does but it is too small for my purposes, I would like to read and send larger bursts because the FIFO is going to be replaced by a FIFO like custom developed functionality later on.

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Teacher
Teacher
126 Views
Registered: ‎07-09-2009

Re: Burst mode UART with custom FIFO and interrupt

As discussed else where in the forums,
the speed of the UART is measured in milli seconds,
calculate for yourself how long it would take for the 16 bytes to be filled in the UART receiver . As soon as first byte comes in , you will be getting the interrupt. Then calculate how fast you will service the interrupt , and then how full the fifo will be before the CPU has emptied it.

As I understand the unit, the uart Lite has a standard AXI lite interface, that supports read write,.

If you want to get the data out of the UART lite, into another memory , then you need a data mover, the output of the UART is not a stream.

A data mover would typical be a DMA engine,
which moves data from the UART to the processor memory.

This is just what the processor would be doing when it got the interrupt, moving data from Uart to memory.

With so little data to move, I'd be surprise dif a DMA engine setup and triggering did not require more CPU overhead than the straight CPU garbing the data.




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