UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
2,524 Views
Registered: ‎01-13-2016

CDMA from PL

I've been able to use the Xilinx CDMA block to transfer data to kernelspace of Linux through the Zynq HP port.


What I would like to do is have my PL logic move a certain buffer of data into PS every time it fills up. Is there a way to trigger the CDMA to do a transfer from the PL logic rather than by starting it from the PS?

0 Kudos
2 Replies
Teacher muzaffer
Teacher
2,501 Views
Registered: ‎03-31-2012

Re: CDMA from PL

@lm_atl you can add a 2x1 interconnect at the axi-lite of the cdma and start the cdma transfer from pl by having a small piece of logic to implement a basic axi-lite master. The flow is like this: the PS program receives the cdma complete interrupt, reprograms the cdma for the next transaction but doesn't start it, when pl fills in the memory it writes to the cdma registers to start the transaction.

 

One question is why you have a cdma in this design. If I understand your system correctly, an axi-dma controller which converts a stream to a memory  mapped transaction probably fits your PL design better. This way, there is no double copying, PL produces a stream of data and it gets written to the address it needs to go as it comes through. CDMA is memory to memory which is overkill here. 

- Please mark the Answer as "Accept as solution" if information provided is helpful.
Give Kudos to a post which you think is helpful and reply oriented.
0 Kudos
Explorer
Explorer
2,462 Views
Registered: ‎01-13-2016

Re: CDMA from PL

Thanks for the reply. I'll look into the AXI stream thing.

Basically the reason I didn't go with that from the start is I'm not really familiar with AXI interfaces, and I didn't quite understand how to take, say, a STD_LOGIC_VECTOR and get that into an axi_dma core. However I do understand how to write to a BRAM, since that's pretty straightforward. Also there were some problems we were having figuring out how to actually handle the memory from the Linux side, which required us to setup the transfer from Linux. But I'll read up on it more.

0 Kudos