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Participant dpandya9488
Participant
460 Views
Registered: ‎08-19-2016

Change clock frequency generated on Zynq 7000- ZC702 Eval Board at "runtime"

Hi,

I want to change the clock frequency in ZC702 board at run time.. Means that right now I am generating a 100MHz clock using IP block- Clocking Wizard. But later I want to change it depending on the algorithm implemented on PL.. Means the clock should be changed depending on the computation results of algorithm in "run-time"..

 

Please advise if there is any provision or method I can implement to achieve this.. either through PL side or PS side..

 

Thanks,

Dhara

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1 Reply
Xilinx Employee
Xilinx Employee
458 Views
Registered: ‎02-06-2013

Re: Change clock frequency generated on Zynq 7000- ZC702 Eval Board at "runtime"

Hi

 

This can be achieved using the DRP ports.

 

Check below xapp

 

https://www.xilinx.com/support/documentation/application_notes/xapp888_7Series_DynamicRecon.pdf

Regards,

Satish

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