UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
3,988 Views
Registered: ‎09-12-2011

Constraints and attributes for Microblaze

Jump to solution

Dear Members;

 

 As far as I know, after instantiating a microblaze (using edk) into an ISE design, a separate constraints file for the microblaze is automatically generated. This is besides the user generated ucf file. I know the mhs and mss files, however I don't know how to access the microblaze specific constraint file.

 

Am I correct thinking that this is automatically generated and how can I find it? I am aware of the one under processor->data. However this doesn't have any constraints on the peripherals.

 

I do also get the following warning in synthesis:

:Xst:387 - The KEEP property attached to the net <Inst_processor/mdm_0/mdm_0/MDM_Core_I1/JTAG_CONTROL_I/Insert_Delays[3].local_sel_n> may hinder timing optimization. You may achieve better results by removing this property

 

Where can I make this change? I looked at the files under processor -> hdl and synthesis. I couldn't find it. 

 

Any help is appreciated.

 

Regards, 

0 Kudos
1 Solution

Accepted Solutions
Instructor
Instructor
5,083 Views
Registered: ‎08-14-2007

Re: Constraints and attributes for Microblaze

Jump to solution

KEEP attributes are usually in the source file.  That could be a VHDL, Verilog or pre-compiled

ngc file.  For EDK designs, most of these files are "under the hood" so you don't normally

get a chance to modify them.

 

-- Gabor

-- Gabor
0 Kudos
4 Replies
Instructor
Instructor
3,987 Views
Registered: ‎08-14-2007

Re: Constraints and attributes for Microblaze

Jump to solution

I'm not sure about your first question, but as for the warning message you should just ignore it.

The KEEP attribute is to prevent removal of signals that only connect to the JTAG debug port.  ISE

does not consider these as supplying an output to a pin, so they would otherwise be removed

and possibly break your JTAG debugger connection.

 

-- Gabor

-- Gabor
0 Kudos
Explorer
Explorer
3,961 Views
Registered: ‎09-12-2011

Re: Constraints and attributes for Microblaze

Jump to solution

Thanks gszakacs! 

 

I understand that the JTAG port connections have KEEP attribute on them so that they won't be removed.

 

But I am really curious to know where these attributes are put? I would expect a design file with this attribute is listed. 

I am not being able to find it. 

 

Any help is appreciated

 

Best Regards, 

0 Kudos
Instructor
Instructor
5,084 Views
Registered: ‎08-14-2007

Re: Constraints and attributes for Microblaze

Jump to solution

KEEP attributes are usually in the source file.  That could be a VHDL, Verilog or pre-compiled

ngc file.  For EDK designs, most of these files are "under the hood" so you don't normally

get a chance to modify them.

 

-- Gabor

-- Gabor
0 Kudos
Explorer
Explorer
3,953 Views
Registered: ‎09-12-2011

Re: Constraints and attributes for Microblaze

Jump to solution
Got it, thanks Gabor!
0 Kudos