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Observer lbpxilinx
Registered: ‎03-02-2015

Custom AXI Stream hardware accelerator tutorials

Hi All,


I am trying to develop a hardware accelerator using Vivado 2014.4 for the Zynq chip. I have completed a number of tutorials that have been pointing me in the right direction but I am still unable to achieve my goal.


I have watched and completed (with varying degrees of success) most of Mohammadsadegh Sadri's and Microelectronic Systems Design Research Group tutorials on YouTube. In one of his videos he talks about creating a hardware accelerator using the AXI Stream interface.


I have created an AXI Stream custom IP which has a slave and master and I want to be able to "stream" data through it. When the data arrives at the AXI Stream custom IP module the data will need to have calculations and modifications  performed on it that require more than one clock cycle.


I have tried a whole variety of thing such as modificating the AXI Stream HDL and writing my own HDL but I have not been successfully. I am aware of the AXI Stream communication signals such as TREADY, TLAST and TVALID but it does not work.


I have gone through a couple posts on this forum but they have been for combinatorial operation (ie the operation does not require clock cycles).


Does anyone know of any good tutorials or examples of creating / modifying and AXI Stream IP to perform custom tasks.

The AXI Stream IP will need to have a slave and master and perform the operation over more than one clock cycle (ie not a combinatorial operation).


Thanks very much,



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3 Replies
Xilinx Employee
Xilinx Employee
Registered: ‎08-01-2008

Re: Custom AXI Stream hardware accelerator tutorials

use this IP





Thanks and Regards
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Xilinx Employee
Xilinx Employee
Registered: ‎08-02-2011

Re: Custom AXI Stream hardware accelerator tutorials

Hi Lincoln,

The AXI Stream Accelerator won't help you here.


The AXI Stream specification is a well defined spec that you can go download from ARM. If your IP adheres to the spec at the interface, it will work. Then you can do whatever you want with the data between the master and slave interfaces.


The best thing I would recommend is to read the spec. It's short and easy to understand. Then write your slave interface. Make it talk to some other IP and simulate it to make sure it's working. Then write your master interface and verify it separately. Then you can put it all together.


Feel free to post back with specific questions/issues that you run into along the way.

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Registered: ‎05-31-2017

Re: Custom AXI Stream hardware accelerator tutorials

I want to use the axis accelerator adator. I know how to config the ip core in vivado , but I don't know how to config it in SDK. The pg081 is too simple. Can you give me some advice ? Thank you so much !

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