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Registered: ‎07-31-2018

Debugging Soft IP core processor

I am using ARM cortex M0 Soft IP core processor. I will be using Ulink debugger which will need to connect to the JTAG controller in my Soft IP core processor.


I can't find any GPIOs in the board to use it as JTAG pins (except the FMC which I will need for other purpose). Is there a way to configure JTAG pins of the board to connect to my JTAG controller like Microblaze processor does?


Why Xilinx board doesn't support other Soft IP core processor other then Microblaze for debugging?

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Xilinx Employee
Xilinx Employee
Registered: ‎07-12-2018

Re: Debugging Soft IP core processor

Hi vivekraj2992@gmail.com,

The debug logic for each processor enables program debugging by controlling the processor execution. 

The debug logic on soft MicroBlaze processor cores is configurable and can be enabled or disabled by the hardware designer when building the embedded hardware.

Enabling the debug logic on Microblaze processors provides advanced debugging capabilities such as hardware breakpoints, read/write memory watch-points, safe-mode debugging, and more visibility into MicroBlaze processors.

This is the recommended method of debugging MicroBlaze software.

Best Regards
Abhinay PS
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