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Visitor mkg0x1
Visitor
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Registered: ‎04-09-2019

Dram test failing

I have a custom board built around the XC7Z020-1CLG484C  using two MT41K512M16HA-125 ddr3 chips connected to the PS. 

I tried the dram test in the SDK  (vivado 2018.1) and the test is failing on all lanes as shown

 

 

Starting Memory Test 's' - Testing 1MB length from address 0x100000...
------------------------------------------------------------------------------------------
    TEST           WORD ERROR             PER-BYTE-LANE ERROR COUNT              TIME
                     COUNT        [ LANE-0 ] [ LANE-1 ] [ LANE-2 ] [ LANE-3 ]    (sec)
------------------------------------------------------------------------------------------
Memtest_0 (  0: 0)      4221         [    3132] [    3132] [    1160] [    1001]    0.0176947
Memtest_s (  0: 1)      6228         [    2984] [    2941] [    3338] [    1003]    0.00825754
Memtest_s (  0: 2)      3398         [    2448] [    2458] [    1006] [    1003]    0.00707789
Memtest_s (  0: 3)      3580         [    2670] [    2701] [    1004] [    1004]    0.00766771
Memtest_s (  0: 4)      3947         [    3093] [    3071] [    1004] [    1004]    0.00766771
Memtest_s (  0: 5)      3598         [    2744] [    2734] [    1007] [    1001]    0.00707789
Memtest_s (  0: 6)      3497         [    2654] [    2657] [    1009] [    1002]    0.00707789
Memtest_s (  0: 7)      3289         [    2355] [    2329] [    1005] [    1004]    0.00707789
Memtest_s (  0: 8)      3361         [    2401] [    2422] [    1005] [    1004]    0.00707789
Memtest_p (  0: 9)      3623         [    2693] [    2698] [    1005] [    1001]    0.0159252
Memtest_p (  0:10)      4085         [    3157] [    3150] [    1001] [    1009]    0.0159252
Memtest_l (  0:11)      4083         [    3155] [    3147] [    1003] [    1001]    0.0176947
Memtest_l (  0:12)      4173         [    3246] [    3245] [    1003] [    1001]    0.0171049
Memtest_l (  0:13)      3892         [    3019] [    3016] [    1002] [    1001]    0.0171049
Memtest_l (  0:14)      4188         [    3205] [    3202] [    1002] [    1001]    0.0171049

The dram test fails with nearly the same number of errors irrespective of the test size as shown below

 

 

Starting Memory Test '2' - Testing 64MB length from address 0x100000...
------------------------------------------------------------------------------------------
    TEST           WORD ERROR             PER-BYTE-LANE ERROR COUNT              TIME
                     COUNT        [ LANE-0 ] [ LANE-1 ] [ LANE-2 ] [ LANE-3 ]    (sec)
------------------------------------------------------------------------------------------
Memtest_0 (  0: 0)      4233         [    3193] [    3186] [    1127] [    1001]    0.996213
Memtest_s (  0: 1)      4496         [    2877] [    2874] [    1730] [    1001]    0.398131
Memtest_s (  0: 2)      3383         [    2499] [    2503] [    1003] [    1003]    0.397541
Memtest_s (  0: 3)      3792         [    2856] [    2888] [    1005] [    1004]    0.398131
Memtest_s (  0: 4)      3703         [    2785] [    2757] [    1004] [    1004]    0.398131
Memtest_s (  0: 5)      3504         [    2589] [    2585] [    1008] [    1004]    0.398131
Memtest_s (  0: 6)      3793         [    2811] [    2805] [    1018] [    1002]    0.398131
Memtest_s (  0: 7)      3351         [    2509] [    2485] [    1004] [    1004]    0.397541
Memtest_s (  0: 8)      3577         [    2641] [    2664] [    1004] [    1004]    0.398131
Memtest_p (  0: 9)      3609         [    2647] [    2641] [    1008] [    1001]    0.933691
Memtest_p (  0:10)      4430         [    3512] [    3504] [    1001] [    1007]    0.933691
Memtest_l (  0:11)      4188         [    3263] [    3270] [    1001] [    1002]    1.02099
Memtest_l (  0:12)      3867         [    2959] [    2955] [    1001] [    1002]    1.02099
Memtest_l (  0:13)      4115         [    3222] [    3220] [    1001] [    1009]    1.02099
Memtest_l (  0:14)      4412         [    3494] [    3500] [    1001] [    1003]    1.02099
Starting Memory Test '2' - Testing 64MB length from address 0x100000...
------------------------------------------------------------------------------------------
    TEST           WORD ERROR             PER-BYTE-LANE ERROR COUNT              TIME
                     COUNT        [ LANE-0 ] [ LANE-1 ] [ LANE-2 ] [ LANE-3 ]    (sec)
------------------------------------------------------------------------------------------
Memtest_0 ERROR: addr=0x100000 rd/ref/xor = 0x0010DBF0 0x00100000 0x0000DBF0
Memtest_0 ERROR: addr=0x100004 rd/ref/xor = 0x0010B7E1 0x00100004 0x0000B7E5
Memtest_0 ERROR: addr=0x100008 rd/ref/xor = 0x00106FC2 0x00100008 0x00006FCA
Memtest_0 ERROR: addr=0x10000C rd/ref/xor = 0x0010DF85 0x0010000C 0x0000DF89
Memtest_0 ERROR: addr=0x100010 rd/ref/xor = 0x0010BF0A 0x00100010 0x0000BF1A
Memtest_0 ERROR: addr=0x100014 rd/ref/xor = 0x00107E15 0x00100014 0x00007E01
Memtest_0 ERROR: addr=0x100018 rd/ref/xor = 0x0010FC2B 0x00100018 0x0000FC33
Memtest_0 ERROR: addr=0x10001C rd/ref/xor = 0x0010F856 0x0010001C 0x0000F84A
Memtest_0 ERROR: addr=0x100020 rd/ref/xor = 0x0010F0AD 0x00100020 0x0000F08D
Memtest_0 ERROR: addr=0x100024 rd/ref/xor = 0x0010E15A 0x00100024 0x0000E17E
Memtest_0 (  0: 0)      4256         [    3290] [    3277] [    1049] [    1001]    1.06109
Memtest_s ERROR: addr=0x100000 rd/ref/xor = 0x3C2ADBF0 0x00000000 0x3C2ADBF0
Memtest_s ERROR: addr=0x100004 rd/ref/xor = 0x7855B7E1 0x00000000 0x7855B7E1
Memtest_s ERROR: addr=0x100008 rd/ref/xor = 0xF0AA6FC2 0x00000000 0xF0AA6FC2
Memtest_s ERROR: addr=0x10000C rd/ref/xor = 0xE154DF85 0x00000000 0xE154DF85
Memtest_s ERROR: addr=0x100010 rd/ref/xor = 0xC2A9BF0A 0x00000000 0xC2A9BF0A
Memtest_s ERROR: addr=0x100014 rd/ref/xor = 0x85527E15 0x00000000 0x85527E15
Memtest_s ERROR: addr=0x100018 rd/ref/xor = 0x0AA4FC2B 0x00000000 0x0AA4FC2B
Memtest_s ERROR: addr=0x10001C rd/ref/xor = 0x1548F856 0x00000000 0x1548F856
Memtest_s ERROR: addr=0x100020 rd/ref/xor = 0x2A91F0AD 0x00000000 0x2A91F0AD
Memtest_s ERROR: addr=0x100024 rd/ref/xor = 0x5522E15A 0x00000000 0x5522E15A
Memtest_s (  0: 1)      5519         [    2936] [    2923] [    2728] [    1003]    0.463012
Memtest_s ERROR: addr=0x100000 rd/ref/xor = 0xFFFFDBF0 0xFFFFFFFF 0x0000240F
Memtest_s ERROR: addr=0x100004 rd/ref/xor = 0xFFFFB7E1 0xFFFFFFFF 0x0000481E
Memtest_s ERROR: addr=0x100008 rd/ref/xor = 0xFFFF6FC2 0xFFFFFFFF 0x0000903D
Memtest_s ERROR: addr=0x10000C rd/ref/xor = 0xFFFFDF85 0xFFFFFFFF 0x0000207A
Memtest_s ERROR: addr=0x100010 rd/ref/xor = 0xFFFFBF0A 0xFFFFFFFF 0x000040F5
Memtest_s ERROR: addr=0x100014 rd/ref/xor = 0xFFFF7E15 0xFFFFFFFF 0x000081EA
Memtest_s ERROR: addr=0x100018 rd/ref/xor = 0xFFFFFC2B 0xFFFFFFFF 0x000003D4
Memtest_s ERROR: addr=0x10001C rd/ref/xor = 0xFFFFF856 0xFFFFFFFF 0x000007A9
Memtest_s ERROR: addr=0x100020 rd/ref/xor = 0xFFFFF0AD 0xFFFFFFFF 0x00000F52
Memtest_s ERROR: addr=0x100024 rd/ref/xor = 0xFFFFE15A 0xFFFFFFFF 0x00001EA5
Memtest_s (  0: 2)      3483         [    2558] [    2566] [    1005] [    1004]    0.462422

 

 

In  princible the DDR controller at the PS side can address only half of the available adresses on the DDR3 chip, additonally the used DDR3 chip is of higher speed than supported by the FPGA

I revised the schematic and found the following

1) The Xadc reference voltages are reversed. Thi smeans Vrefp is connected to ground and Vrefn is connected to 1.25V reference. I expected the ADC readings to be negative but the system monitor shows reasonable values

2) The DDR3 reset signal is not pulled down by 4.7K as in other demo boards.

3) Address line a15 of the DDR which is not connected to the FPGA is pulled high to VTT  (termination voltage of the DRR)

 

 

My questions are

1)  What effect does the reversed XADC reference voltage have on the FPGA performance?

2) How critical is the 4.7K pull down resistor for the DDR3 reset on functionality?

3) Should the unused address line a15 be pulled down?

Kind regards

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