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Newbie palhinhaa
Newbie
2,997 Views
Registered: ‎05-15-2013

EDK Utility IO Multiplexor

Hello im trying to use the Core Utility IO Multiplexor from EDK to multiplex two diferent signals to one port but im not having success.

 

In the Utility IO Multiplexor core datasheet its not explicit if the Tristate is active low or high. I open the core HDL source but the Tristate inputs are not used. How are the tristate inputs used?

 

Thank you

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Scholar austin
Scholar
2,996 Views
Registered: ‎02-27-2008

Re: EDK Utility IO Multiplexor

p,

 

These are inputs, and outputs, from blocks INSIDE the FPGA device (internal signals).  They are not for input and output PINS on the IOB blocks.

 

There are no tristate signals inside the FPGA fabric (interconnect).

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Newbie palhinhaa
Newbie
2,988 Views
Registered: ‎05-15-2013

Re: EDK Utility IO Multiplexor

Thank you its always good to know that.

So why the datasheet of the core have the tristate function? In my opinion the datasheet should mirror the HDL code.

Thank you
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