01-29-2014 05:52 AM
As in some examples of zc702, I could route EMIO to PL side package pins.
But, how can I route the EMIO signals through the PL logic. I couldn't find any examples about it.
It is said it can be routed through PL logic in the tutorials video on "MIO and EMIO configuration for Zynq7000", but HOW?
01-29-2014 06:09 AM
Can you please refer to the AR http://www.xilinx.com/support/answers/51786.htm
Let me know if this helps.
01-29-2014 09:23 PM
Thanks for your quick reply.
I had looked into the example "gio_mio_emio_axi". It just connects the EMIO signals to DS (LED).
Now , say I have made a combinational logic circuit in the PL. Then, can I use the EMIO signals as input to that logical circuit, without assigning the EMIO signals to any package pins?
02-04-2014 08:09 PM
Only thing I had to do, was to map EMIO to a signal and use that signal in my VHD code.