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Adventurer
Adventurer
537 Views
Registered: ‎08-06-2018

How to use OCM for dual cores on zynq

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Hi,

I'm trying to run both cores on zynq under system debugger. However, when I run both cores, core0 behaves weird. It seems run to a weird place.

1.PNG

I check the assemble code, it is weird too.

2.PNG

However, when I run core0 alone, it is normal:

3.PNG

4.PNG

 

here is my two linker.ld for core0 and core1:

5.PNG6.PNG

The .text is located in ram_0 and ram_1, all other sections located in ddr.

If I change the .text in core0 to ddr, both cores can run normally. So I guess it's a problem of ocm allocation.

Is there anything wrong with my linker file? Any rules or constraints in using ocm??

 

Best Regards

 

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Adventurer
Adventurer
472 Views
Registered: ‎08-06-2018

Re: How to use OCM for dual cores on zynq

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Thank you, @cch

I've read xapp 1079, however it does not help me much. Since the example design doesnot use OCM much, only use as a global sync flag. And I don't see any helpful info when I read the linker script of this example. 

I'm using SDK 2017.4. bare-metal on both cores. My goal is to use a part of  OCM as shared memory between two cores and the other part of OCM is divided by two cores as two private memories.

I changed my linker script of core1 , the only difference from the linker.ld in my last post is that I changed ps_ram_1's base and size to 0x20000 and 0x10000. The linker.ld of core0 stayed the same as my last post shows.

7.PNG

The weird behavior on core0 has gone. But I still don't see the real problem.

Can you help me with this?

Best regards

 

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3 Replies
Xilinx Employee
Xilinx Employee
491 Views
Registered: ‎09-04-2012

Re: How to use OCM for dual cores on zynq

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The cores are not completely independent, they are part of a cluster that share resources.

Take a look at XAPP1079 which provides information on how to run a bare metal AMP system on Zynq-7000.

Regards,

Christophe

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Adventurer
Adventurer
473 Views
Registered: ‎08-06-2018

Re: How to use OCM for dual cores on zynq

Jump to solution

Thank you, @cch

I've read xapp 1079, however it does not help me much. Since the example design doesnot use OCM much, only use as a global sync flag. And I don't see any helpful info when I read the linker script of this example. 

I'm using SDK 2017.4. bare-metal on both cores. My goal is to use a part of  OCM as shared memory between two cores and the other part of OCM is divided by two cores as two private memories.

I changed my linker script of core1 , the only difference from the linker.ld in my last post is that I changed ps_ram_1's base and size to 0x20000 and 0x10000. The linker.ld of core0 stayed the same as my last post shows.

7.PNG

The weird behavior on core0 has gone. But I still don't see the real problem.

Can you help me with this?

Best regards

 

View solution in original post

Xilinx Employee
Xilinx Employee
430 Views
Registered: ‎09-04-2012

Re: How to use OCM for dual cores on zynq

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There are no issues sharing the OCM as long as your linker script for each core does not overlap.

A couple things to keep in mind:

  1. Make sure to use the symbol "USE_AMP" when compiling for core 1
  2. The OCM map out of reset is:0x0 to 0x2_FFFF (192KB) and 0xFFFF_0000 to 0xFFFF_FFFF (64KB). Some locations in the higher OCM are used to keep core1 in WFE state. Refer to Chapter 29 of the TRM

If you are seeing runtime issues I would recommend stepping through your code to see what is happening.

Regards,

Christophe

 

 

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