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Visitor ggnicer
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19,328 Views
Registered: ‎12-12-2012

How to use PCAP to config the PL in zynq

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hi all:

It is hard to me to find the doc for using PCAP to config the PL in Zynq7000 

i have read the ug585, but I need some more detailed information.

Is there any step by step tutorial or example?

 

errrr...   By the way I try to get the answer by read the FSBL code, and is there any doc for FSBL in detail?

 

Any one can help me? thanks!

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Xilinx Employee
Xilinx Employee
25,414 Views
Registered: ‎12-08-2011

Re: How to use PCAP to config the PL in zynq

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you can use something like this:

 

int XDcfg_TransferBitfile(XDcfg *Instance, u32 StartAddress, u32 WordLength)
{
	int Status;
	volatile u32 IntrStsReg = 0;

	// Clear DMA and PCAP Done Interrupts
	XDcfg_IntrClear(Instance, (XDCFG_IXR_DMA_DONE_MASK | XDCFG_IXR_D_P_DONE_MASK));

	// Transfer bitstream from DDR into fabric in non secure mode
	Status = XDcfg_Transfer(Instance, (u32 *) StartAddress, WordLength, (u32 *) XDCFG_DMA_INVALID_ADDRESS, 0, XDCFG_NON_SECURE_PCAP_WRITE);
	if (Status != XST_SUCCESS)
		return Status;

	// Poll DMA Done Interrupt
	while ((IntrStsReg & XDCFG_IXR_DMA_DONE_MASK) != XDCFG_IXR_DMA_DONE_MASK)
		IntrStsReg = XDcfg_IntrGetStatus(Instance);

	// Poll PCAP Done Interrupt
	while ((IntrStsReg & XDCFG_IXR_D_P_DONE_MASK) != XDCFG_IXR_D_P_DONE_MASK)
		IntrStsReg = XDcfg_IntrGetStatus(Instance);

	return XST_SUCCESS;
}

 

the corresponding function call should look something like this:

 

	// Transfer Bitfile using DEVCFG/PCAP
	int Status = XDcfg_TransferBitfile(XDcfg_0, Address, (BITFILE_LEN >> 2));
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR : FPGA configuration failed!\n\r\n\r");
		exit(EXIT_FAILURE);
	}

 

Address is where your bitfile is stored in memory. You can use xmd for example to load a bitfile into memory.

 

xmd% dow -data bitfile.bin 0x00200000

Or you store the bitfile on SD card and transfer it to memory from there as done inside the FSBL.

 

The bitfile needs to be converted to bin format first which can be done using the promgen tool. It will also tell you the length of your bitfile in bytes which is the second parameter to pass to the XDcfg_TransferBitfile() function. Note that the driver function XDcfg_Transfer() expects the size in words, hence the (BITFILE_LEN >> 2).

 

This is the promgen command you can use:

 

promgen -b -w -p bin -data_width 32 -u 0 bitfile.bit -o bitfile.bin

you would have to look at the driver code and the example file shipped with the driver a bit. more info on the devcfg core can be found in the TRM and it might be worth looking at the register map for the devcfg device.

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18 Replies
Visitor ggnicer
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Registered: ‎12-12-2012

Re: How to use PCAP to config the PL in zynq

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ok... after reading FSBL code I find a function in image_mover.c

 

it is write pcapXferDate(

(u32*)(SourceAddr),

(u32*)XDCFG_DMA_INVALID_ADDRESS,

(ImageLength),0,XDCFG_SECURE_PCAP_WRITE

) ;

 

I am sure that the function configs the PL

 

but my question is How to use it in my helloworld.c indtead of the main() of FBSL.

 

 

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Visitor ggnicer
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19,303 Views
Registered: ‎12-12-2012

Re: How to use PCAP to config the PL in zynq

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//well I found this function move the bitimage from ddr memory to DestinationData

 

//but I dont konw where DestinationData is

 

XDcfg_Transfer(DcfgInstPtr, (u8 *)DDR_buffer,
                                SourceLength,
                                (u8 *)DestinationData,
                                DestinationLength, Flags);

 

//I wonder if  XDcfg_Transfer start a DMA transfer?

 

//and then

 

while ((IntrStsReg & XDCFG_IXR_DMA_DONE_MASK) !=
               XDCFG_IXR_DMA_DONE_MASK) {
        IntrStsReg = XDcfg_IntrGetStatus(DcfgInstPtr);
  Count -=1;
  if(!Count) {
      debug_xil_printf("PCAP transfer timed out \n");
   return XST_FAILURE;
  }
  if (Count > (MAX_COUNT - 100)) {
      debug_xil_printf("Count for pcap download %d \n",Count);
  }
    } /* end of while */

 

//yeah..  it waits for the dma end

 

//and then it wait for the config end

 

WritePcapISR(IntrStsReg & XDCFG_IXR_DMA_DONE_MASK);
    /* Poll for FPGA Done */
    if (IsBitstream) {
        Count = MAX_COUNT;
        while ((IntrStsReg & XDCFG_IXR_PCFG_DONE_MASK) !=
               XDCFG_IXR_PCFG_DONE_MASK) {
           IntrStsReg = XDcfg_IntrGetStatus(DcfgInstPtr);
           Count -=1;
     if (!Count) {
               debug_xil_printf("FPGA config timed out \n");
      return XST_FAILURE;
            }

         } /* end of while */
    debug_xil_printf("STATUS for XDCFG_IXR_PCFG_DONE_MASK \n");
    WritePcapISR(IntrStsReg & XDCFG_IXR_PCFG_DONE_MASK);
    } /* End of IsBitstream*/

 

//OK I guess that :

first the image is read as a file from SDcard to DDR3

 

then it uses DMA move the image from DDR3 to PL(PCAP????)

 

the it uses the image to config PL(How????)

 

well,  Next , I will try to read the image to DDR in the helloworld app ..

but the DMA need many parameters and many .h and .c file.... 

e..  has anyone done it before?  I am really crazy  about it .....

 

 

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Xilinx Employee
Xilinx Employee
25,415 Views
Registered: ‎12-08-2011

Re: How to use PCAP to config the PL in zynq

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you can use something like this:

 

int XDcfg_TransferBitfile(XDcfg *Instance, u32 StartAddress, u32 WordLength)
{
	int Status;
	volatile u32 IntrStsReg = 0;

	// Clear DMA and PCAP Done Interrupts
	XDcfg_IntrClear(Instance, (XDCFG_IXR_DMA_DONE_MASK | XDCFG_IXR_D_P_DONE_MASK));

	// Transfer bitstream from DDR into fabric in non secure mode
	Status = XDcfg_Transfer(Instance, (u32 *) StartAddress, WordLength, (u32 *) XDCFG_DMA_INVALID_ADDRESS, 0, XDCFG_NON_SECURE_PCAP_WRITE);
	if (Status != XST_SUCCESS)
		return Status;

	// Poll DMA Done Interrupt
	while ((IntrStsReg & XDCFG_IXR_DMA_DONE_MASK) != XDCFG_IXR_DMA_DONE_MASK)
		IntrStsReg = XDcfg_IntrGetStatus(Instance);

	// Poll PCAP Done Interrupt
	while ((IntrStsReg & XDCFG_IXR_D_P_DONE_MASK) != XDCFG_IXR_D_P_DONE_MASK)
		IntrStsReg = XDcfg_IntrGetStatus(Instance);

	return XST_SUCCESS;
}

 

the corresponding function call should look something like this:

 

	// Transfer Bitfile using DEVCFG/PCAP
	int Status = XDcfg_TransferBitfile(XDcfg_0, Address, (BITFILE_LEN >> 2));
	if (Status != XST_SUCCESS) {
		xil_printf("ERROR : FPGA configuration failed!\n\r\n\r");
		exit(EXIT_FAILURE);
	}

 

Address is where your bitfile is stored in memory. You can use xmd for example to load a bitfile into memory.

 

xmd% dow -data bitfile.bin 0x00200000

Or you store the bitfile on SD card and transfer it to memory from there as done inside the FSBL.

 

The bitfile needs to be converted to bin format first which can be done using the promgen tool. It will also tell you the length of your bitfile in bytes which is the second parameter to pass to the XDcfg_TransferBitfile() function. Note that the driver function XDcfg_Transfer() expects the size in words, hence the (BITFILE_LEN >> 2).

 

This is the promgen command you can use:

 

promgen -b -w -p bin -data_width 32 -u 0 bitfile.bit -o bitfile.bin

you would have to look at the driver code and the example file shipped with the driver a bit. more info on the devcfg core can be found in the TRM and it might be worth looking at the register map for the devcfg device.

View solution in original post

Visitor ggnicer
Visitor
19,285 Views
Registered: ‎12-12-2012

Re: How to use PCAP to config the PL in zynq

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ckohn, thanks for your helpful answer. With your reply now I can continue my work in a right direct.

 

But there are still some problems.

 

1. What is the difference between bitfile.bit and bitfile.bin?

 

2.How can I use XDcfg_Transfer() in my own helloworld project? Just copy the corresponding files from FSBL project ?

 

3.I am not familiar with the promgen tool, I just used the GUI of BIN generator in EDK before ,where can I get some support for it? Could you recommand me some doc?           

sorry for my poor English.                              

                                                                                                                                                                                          Thank you 

 

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Xilinx Employee
Xilinx Employee
19,266 Views
Registered: ‎12-08-2011

Re: How to use PCAP to config the PL in zynq

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1) A .bin file is the binary representation of the configuration bitstream. The .bit contains the configuration data plus additional data in the bit file header.

 

2) You don't have to copy any files. The devcfg driver is part of the bsp... you only need to include the corresponding header file in your source file to use this function.

 

#include "xdevcfg.h"

 

3) More information on the promgen tool can be found in UG628, Command Line Tools User Guide.  Alternatively, you can use bootgen to create a .bin file from your bitstream. See http://www.xilinx.com/support/answers/46913.htm.

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Visitor ggnicer
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Registered: ‎12-12-2012

Re: How to use PCAP to config the PL in zynq

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OK thanks to 

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Observer schlauby
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19,107 Views
Registered: ‎08-15-2011

Re: How to use PCAP to config the PL in ZYNQ

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Hey ggnicer,

 

I have similar problems. I want to partial reconfigure the PL from PS.

How did you manage to make a running configuration from your main.c?

 

Would you mind sharing your helloworld code with me? Or did you find a tutorial for ZYNQ and PCAP?

 

My code is running the way ckohn explained it. But the reconfiguration is not working. The PL doesen't change the bitstream...

 

br

Andy

 

 

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Xilinx Employee
Xilinx Employee
19,099 Views
Registered: ‎12-08-2011

Re: How to use PCAP to config the PL in ZYNQ

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There will be an official app note on partial reconfiguration including reference design for Zynq soon. Look out for XAPP1159.

 

When running through the PR design flow, the tool creates partial as well as full bitstreams for every configuration. Have you tested the full bitstreams of your PR design and do they work as expected?

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Observer schlauby
Observer
19,094 Views
Registered: ‎08-15-2011

Re: How to use PCAP to config the PL in ZYNQ

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I tested each of the full bitstreams by its own and they all worked as expected. But I'm also not able to load the full bitstream with DCAP.

Further I tested: loading a full bitstream and load the partial bitstream with chipscope it also works fine.

So I guess it's not the bitstream. I guess the major problem is somewhere hidden in the code?!?

 

Do I need to activate something special in XPS/SDK or do I have to load some special registers while boot?

 


Do you know the date when XAPP1159 will be released.

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Observer schlauby
Observer
11,524 Views
Registered: ‎08-15-2011

Re: How to use PCAP to config the PL in ZYNQ

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Hey folks,

 

I finaly solved my problem. And want to let you know my mistake, just in case some of you has similar problems.

 

The very first APB access to the Device Configuration Interface block needs to be a write to the UNLOCK register with the value of 0x757BDF0D. This step is to be done once after reset, any other APB access has to come after this. The APB access is considered illegal if the step is not done or if it is done incorrectly.

 

So you have to add the following line

 

Status = XDcfg_CfgInitialize(&DcfgInstance, ConfigPtr, 
                                  ConfigPtr->BaseAddr);
XDcfg_SetLockRegister(&DcfgInstance, 0x757BDF0D);

I hope this may save some of you some time...

 

br

Andy

 

Contributor
Contributor
11,488 Views
Registered: ‎10-21-2012

Re: How to use PCAP to config the PL in zynq

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Hi All,

 

  I am still having some trouble getting this to work. Here are the exact steps I am taking and the code I am using. Can someone please comment if you see anything terribly incorrect?

 

Converted the Full and Partial Bitstreams to .bin with

 

promgen -b -w -p bin -data_width 32 -u 0 bitfile.bit -o bitfile.bin

 I tested the partials by just programming the .bit in Impact so I know the cores work. They basically just change the way some LEDs are lit on a Zedboard.

 

Steps:

1. Power on Board and Program with full bitfile using Impact

2. Load XPS Open up the XMD console and program a partial .bin file to an address in DDR

 

xmd% dow -data bitfile.bin 0x00200000

3. Close XMD, XPS and Load the SDK

4. Right Click on the Project  > Run As > Run Configurations... > [Xilinx C/C++ ELF] > [Main] > Run

 

Code I am running Stand Alone is as Follows:

 

#define BIT_STREAM_SIZE_WORDS 0x2F038 //Length of Bin taken from Promgen Command
#define BIT_STREAM_LOCATION 0x00200001  // the b01 at the end tells the DMA which is used in between that this is the last configuration cycle


#define DCFG_DEVICE_ID XPAR_XDCFG_0_DEVICE_ID

static  XDcfg DcfgInstance;	/*Instance of the Device Configuration*/


int main()
{
    init_platform();

    int Status;
    volatile u32 IntrStsReg = 0;
    XDcfg_Config *ConfigPtr;

    print("Config Prointer \n\r");
    //Get Configuration Pointer Information
    ConfigPtr = XDcfg_LookupConfig(DCFG_DEVICE_ID);
    if (ConfigPtr == NULL) {return XST_FAILURE;	}

    print("Init Device Config \n\r");
    //Initialize the Device Config
    Status = XDcfg_CfgInitialize(&DcfgInstance, ConfigPtr, ConfigPtr->BaseAddr);
    if (Status != XST_SUCCESS) { return XST_FAILURE; }

    print("Set Lock Reg \n\r");
    /*The very first APB access to the Device Configuration Interface
    *		block needs to be a write to the UNLOCK register with the value
    *		of 0x757BDF0D.
    */
    XDcfg_SetLockRegister(&DcfgInstance, 0x757BDF0D);

    print("Intr Clear \n\r");
    // Clear DMA and PCAP Done Interrupts
    XDcfg_IntrClear(&DcfgInstance, (XDCFG_IXR_DMA_DONE_MASK | XDCFG_IXR_D_P_DONE_MASK));


    print("Download Bit \n\r");
    // Download bitstream in non secure mode
    Status = XDcfg_Transfer(&DcfgInstance, (u32 *)BIT_STREAM_LOCATION,
    		BIT_STREAM_SIZE_WORDS>>2, //because of 32bit words
    		(u32 *)XDCFG_DMA_INVALID_ADDRESS,
    		0, XDCFG_NON_SECURE_PCAP_WRITE);
    if (Status != XST_SUCCESS) { return XST_FAILURE; }

    print("Poll DMA \n\r");
    // Poll DMA Done Interrupt
    	while ((IntrStsReg & XDCFG_IXR_DMA_DONE_MASK) != XDCFG_IXR_DMA_DONE_MASK)
    		IntrStsReg = XDcfg_IntrGetStatus(&DcfgInstance);

    print("Poll PCAP \n\r");
    // Poll PCAP Done Interrupt
    	while ((IntrStsReg & XDCFG_IXR_D_P_DONE_MASK) != XDCFG_IXR_D_P_DONE_MASK)
    		IntrStsReg = XDcfg_IntrGetStatus(&DcfgInstance);


    cleanup_platform();

    return 0;
}

 Can anyone see anything wrong? I am really struggling on how to get this to work so any help is appreciated

Thanks!

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Newbie gyana.sahu
Newbie
9,995 Views
Registered: ‎08-16-2014

Re: How to use PCAP to config the PL in zynq

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What most people are doing wrong is that they are trying to run the code in slave/JTAG mode. TRM explicitly mentions PCAP can function in master mode only.
Visitor davidc0000
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9,965 Views
Registered: ‎08-18-2014

Re: How to use PCAP to config the PL in zynq

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I'm not quite sure about what you mean running the code in slave/JTAG or master mode? How do I tell which mode I'm running on?
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Newbie gyana.sahu
Newbie
9,940 Views
Registered: ‎08-16-2014

Re: How to use PCAP to config the PL in zynq

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Booting in Master mode means you have to use either SD boot,QSPI mode or other master modes. Based upon the mode you have to change the configuration pins on zedboard.

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Newbie gyana.sahu
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Registered: ‎08-16-2014

Re: How to use PCAP to config the PL in zynq

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There is something wrong when i am running the code as mentioned in XAPP1159. I am using the FSBL code to first transfer the partial binary files to DDR locations. And I use the XDcfd_Transfer function from the helloworld file to reconfigure the PL. But the reconfiguration does not change the previous results. I even loaded a wrong binary file and reconfiguration was successfull. And surprisingly the reconfigured module reported the previous results. So, I thing there is something seriously wrong about this application or device driver function.

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Visitor sifalios
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Registered: ‎11-27-2014

Re: How to use PCAP to config the PL in zynq

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Hi I have the same problem as gyana.sahu described have you found any solution yet?

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Visitor ltambara
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8,327 Views
Registered: ‎03-28-2014

Re: How to use PCAP to config the PL in zynq

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Hi,

 

I'm trying to write a single frame into PL, but I have a doubt.

 

If the way to write a single frame is similar to read a single frame or to program the whole PL,  where do I have put the PCAP commands in the XDCFG_TRANSFER function?

 

I'm able to read a single frame in Zynq and I know how to write a single frame in an Artix-7 FPGA,  but I don't know where I have to put the PCAP commands in the XDCFG_TRANSFER function. 

 

Somebody could help me?

 

Thanks. 

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Newbie bill_a
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2,506 Views
Registered: ‎01-04-2019

Re: How to use PCAP to config the PL in zynq

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The following code in the example isn't right:

	// Poll PCAP Done Interrupt
	while ((IntrStsReg & XDCFG_IXR_D_P_DONE_MASK) != XDCFG_IXR_D_P_DONE_MASK)
		IntrStsReg = XDcfg_IntrGetStatus(Instance);

It should be as follows:

    // Poll PCAP Done Interrupt
    while ((IntrStsReg & XDCFG_IXR_PCFG_DONE_MASK) != XDCFG_IXR_PCFG_DONE_MASK)
        IntrStsReg = XDcfg_IntrGetStatus(Instance);

Regards,
Bill

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