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Visitor b.allen
Registered: ‎12-13-2017

Initiating a PL-only reset via JTAG

I'm working on using the Xilinx Secure Key library (xilskey) to initiate programming of a new BBRAM key while the Zynq is running software/hardware.  The actual setup requires a custom routing to the JTAG port (see XAPP1223), so that means I don't have JTAG debug available during this process.  I'm using the MicroZed development board (with a battery added on to it).


1) If there's a way that I can run the SDK Debugger without the JTAG connection, please let me know.  I have yet to discover one.

2) At the point where the code initiates a JTAG JPROGRAM command, I stop getting any printf statements on the PS7_UART.  The JPROGRAM command is JTAG's way of initiating a PROG_B reset on the PL.  I expect to lose my hardware configuration and the Done light goes off, but I get no further indication of what my software is doing.

    a) Why did I lose print statements on my PS7_UART.  The PS is not supposed to be part of this reset according to XAPP1223, and it can't be because the next step is to jump over to Partition Loader and load new configurations/software.  The ARM cores are still running (if I plug in JTAG after this and connect to already running processes, then it's happy to do so).

    b) I know that the BBRAM isn't being programmed because if I reset the board, the original load comes up just fine.  If BBRAM write worked, then proper decryption wouldn't happen because my Flash image was encrypted with the original key, not the newly programmed one.

3) I've been trying to manually recreate the process in xilskey_jscmd's Bbram_Init function to try and see what happens.  I keep getting "expected hexadecimal string but got "0x3F" instead" or "can't use non-numeric string as operand of "+"" depending on how I try to format the data, so I can't get past the syntax issues.

jtag targets 3
jtag sequence set myseq ::jtagseq#0 $myseq state RESET $myseq run $myseq clear $myseq state IDLE $myseq run $myseq clear $myseq atomic enable $myseq irshift -hex -state IDLE bits 0x3F $myseq run $myseq clear $myseq irshift -hex -state IDLE bits 0x0B $myseq run

Bottom line: The very next action after the JPROGRAM command is just an idle loop to give the PL time to settle before checking the IRCapture status to ensure INIT completed.  The next thing that happens in the code is programming of the new BBRAM key.  Something is breaking in between those steps and I need to come up with some method of figuring out what it is.  Any help is appreciated.


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Visitor b.allen
Registered: ‎12-13-2017

Re: Initiating a PL-only reset via JTAG

So I never got anywhere with the debug or manual JTAG, but I did resolve the main issue.

Wiping the PL while you still have interrupts set up in the PS is a bad idea.  I made sure to disable and disconnect the UartLite interrupts in the code prior to initiating the re-program of the key and that stopped things from hanging.

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