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Observer luminal101
Observer
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Registered: ‎02-10-2017

LwIP configured for DMA, but H/W uses FIFO

My H/W design uses the AXI 1G/2.5G Ethernet Subsystem with a FIFO attached. In the Xilinx SDK, this is correctly reflected in the xparameters.h file:

 

Capture.JPG

 

The LWIP library, however seems to be configured for DMA. For example, in .../microblaze_0/libsrc/lwip202_v1_1/src/contrib/ports/xilinx/include/xlwipconfig.h:

 

Capture1.JPG

The compilation fails with error messages like 'xaxidma.h could not be found'. I have tried so far:

- Regenerated the board support package

- Deleted the entire SDK project and start the S/W from scratch

- Wrote a project.tcl file, deleted the entire Vivado project, and regenerated the H/W and S/W from scratch

- Removed and reinstalled Viviado

 

Unfortunately without success. Why is LWIP configured for DMA, when my H/W uses a FIFO???

 

(I'm using Vivado 2018.2.1).

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