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Observer braydencdv
Observer
443 Views
Registered: ‎06-13-2018

MicroBlaze design running in BRAM and DDR

I have created a project in vivado that contains a microblaze connected to both BRAM and DDR. I need to be able to run an application in BRAM, do a soft reset of the blaze, have it switch and run out of the DDR. Is there a way to change the vector base address in software while running in BRAM, then soft reset, and so that it starts running out or DDR after the reset? I haven't found anything that shows where to change the address, except for in the Vivado Gui where you can change it by opening the Microblaze config wizard. Or is it possible to change the program counter/any pointer and point it to the new application? that way no reset is needed.

Secondly how would I go about loading a program into BRAM and loading a program into DDR at the same time? I esentially want to run a helloworld/simple app out of BRAM and then switch over to the other application in DDR that is to big to run out of BRAM. So each memory space would be holding a completely different app simultaneously. 

 

I may be totally off on this but never had to swap between memories before and apps before so I'm just not to sure.

 

Thank you in Advance.

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3 Replies
Xilinx Employee
Xilinx Employee
416 Views
Registered: ‎09-01-2014

Re: MicroBlaze design running in BRAM and DDR

If you issue a reset to MB, MB starts executing at the reset vector, defined by C_BASE_VECTORS. C_BASE_VECTORS is configurable in Microblaze config wizard, but cannot be dynamicaly changed by SW level.
If you want MB starting from other reset vector address, maybe put a jump code to the orignal reset vector address, then issue SW reset to MB.

For 2, SW loading address is defined in the linker script, you can change it in the SDK.

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Observer braydencdv
Observer
399 Views
Registered: ‎06-13-2018

Re: MicroBlaze design running in BRAM and DDR

@ritakur For the first part, in inserting the jump code at the begining, I'll look into that. 

For 2: What exactly has to be changed in the linkerscript for it to load into a differnt address?

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Xilinx Employee
Xilinx Employee
387 Views
Registered: ‎09-01-2014

Re: MicroBlaze design running in BRAM and DDR

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