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Registered: ‎10-12-2016

PL configurable clocks from ps not working after some time they are reset to some different value.

Hi Friends,


I am using Microzed board, i used FCLK_CLK0 for my design. this clock i brought out to SMA to verify the clock. while implementing block design i set this clock default value to 100MHz. 


1) But i am getting 50MHz after loading bit stream.? 

2) i configured it to 100MHz, but after some time again it reset to 24.567* MHz. 


NOTE: Any help or suggestions are highly appreciated.

NOTE: i configured above clock using registers provided in Zynq TRM.


Thank You 

S Sampath 


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